PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 126

• Manufacturer Part Number: PIC16F887-I/PT
• Description: MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-I/PT

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TFQP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
11.1
The Enhanced Capture/Compare/PWM module is a
peripheral which allows the user to time and control
different events. In Capture mode, the peripheral
allows the timing of the duration of an event. The
Compare mode allows the user to trigger an external
event when a predetermined amount of time has
expired. The PWM mode can generate a Pulse-Width
Modulated signal of varying frequency and duty cycle.
Table 11-1 shows the timer resources required by the
ECCP module.
REGISTER 11-1:
DS41291D-page 124
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
R/W-0
P1M1
Enhanced Capture/Compare/PWM
(CCP1)
P1M<1:0>: PWM Output Configuration bits
If CCP1M<3:2> = 00, 01, 10:
xx =
If CCP1M<3:2> = 11:
00 =
01 =
10 =
11 =
DC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: ECCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected)
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 or TMR2
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
R/W-0
P1M0
CCP1CON: ENHANCED CCP1 CONTROL REGISTER
P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
Half-Bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
W = Writable bit
‘1’ = Bit is set
DC1B1
R/W-0
DC1B0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
TABLE 11-1:
R/W-0
ECCP Mode
Compare
Capture
PWM
CCP1M2
R/W-0
ECCP MODE – TIMER
RESOURCES REQUIRED
© 2007 Microchip Technology Inc.
x = Bit is unknown
CCP1M1
R/W-0
Timer Resource
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0