PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 222

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PIC16F887-I/PT

Manufacturer Part Number
PIC16F887-I/PT
Description
MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F887-I/PT

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
35
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TFQP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
MSSP or EUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F882/883/884/886/887
14.5
The WDT has the following features:
• Operates from the LFINTOSC (31 kHz)
• Contains a 16-bit prescaler
• Shares an 8-bit prescaler with Timer0
• Time-out period is from 1 ms to 268 seconds
• Configuration bit and software controlled
WDT is cleared under certain conditions described in
Table 14-7.
14.5.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit of the OSCCON register does
not reflect that the LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 17 ms.
FIGURE 14-9:
TABLE 14-7:
DS41291D-page 220
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
Note 1:
31 kHz
Watchdog Timer (WDT)
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
This is the shared Timer0/WDT prescaler. See Section 5.4 “Prescaler” for more information.
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from the Configuration Word Register 1
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
Preliminary
14.5.2
The WDTE bit is located in the Configuration Word
Register 1. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word
Register 1 is set, the SWDTEN bit of the WDTCON
register has no effect. If WDTE is clear, then the
SWDTEN bit can be used to enable and disable the
WDT. Setting the bit will enable it and clearing the bit
will disable it.
The PSA and PS<2:0> bits of the OPTION register
have the same function as in previous versions of the
PIC16F882/883/884/886/887 Family of microcontrol-
lers. See Section 5.0 “Timer0 Module” for more infor-
mation.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
© 2007 Microchip Technology Inc.
0
Prescaler
Cleared
1
8
WDT
(1)
PSA
PS<2:0>
To TMR0

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