PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 229

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PIC16F887-I/PT

Manufacturer Part Number
PIC16F887-I/PT
Description
MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F887-I/PT

A/d Inputs
14-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
35
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TFQP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
MSSP or EUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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15.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
© 2007 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 ≤ f ≤ 127
d ∈ [0,1]
(W) + (f) → (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND W with f
[ label ] ANDWF
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .AND. (f) → (destination)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
(W) + k → (W)
(W) .AND. (k) → (W)
Add literal and W
[ label ] ADDLW
0 ≤ k ≤ 255
C, DC, Z
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the
W register.
AND literal with W
[ label ] ANDLW
0 ≤ k ≤ 255
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
f,d
f,d
k
k
PIC16F882/883/884/886/887
Preliminary
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 ≤ f ≤ 127
0 ≤ b ≤ 7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded, and a NOP
is executed instead, making this a
two-cycle instruction.
Bit Clear f
[ label ] BCF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
0 → (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
1 → (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
f,b
f,b
DS41291D-page 227

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