ICS1893BK IDT, Integrated Device Technology Inc, ICS1893BK Datasheet - Page 94
ICS1893BK
Manufacturer Part Number
ICS1893BK
Description
PHYCEIVER LOW PWR 3.3V 56-MLF2
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Specifications of ICS1893BK
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
56-VQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
1893BK
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS1893BKILFT
Manufacturer:
IDT
Quantity:
5 000
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ICS1893BF, Rev. E, 8/11/09
Table 8-5. PHY Address and LED Pins
P2LI
P3TD
Name
Pin
ICS1893BF Data Sheet - Release
Number
Pin
4
6
Input or
Input or
Output
Output
Type
Pin
PHY (Address Bit) 2 / Link Integrity LED.
For more information on this pin, see
As an input pin:
As an output pin:
PHY (Address Bit) 3 / Transmit Data LED.
For more information on this pin, see
As an input pin:
As an output pin:
Caution:
Caution:
•
•
•
•
•
•
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
– An output pin following reset. In this case, this pin provides link status
This pins establishes the address for the ICS1893BF. When the signal
on this pin is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893BF does not have a
– Asserted, this state indicates the ICS1893BF has a valid link.
These multi-function configuration pins are:
– Input pins during either a power-on reset or a hardware reset. In this
– Output pins following reset. In this case, this pin provides indication
This pin establishes the address for the ICS1893BF. When the signal
on one of these pins is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893BF does not have
– Asserted, this state indicates the ICS1893BF has Transmit activity.
this case, this pin configures the address of the ICS1893BF PHY
Address Bit 2.
for the ICS1893BF.
link.
case, these pins configure the address of the ICS1893BF PHY
Address Bit 3.
of Transmit activity.
Transmit activity.
Copyright © 2009, IDT, Inc.
All rights reserved.
This pin must not float. (See the notes at
“Multi-Function (Multiplexed) Pins: PHY Address and LED
Pins”.)
This pin must not float. (See the notes at
“Multi-Function (Multiplexed) Pins: PHY Address and LED
Pins”.)
94
Chapter 8 Pin Diagram, Listings, and Descriptions
Pin Description
Section 5.5, “Status
Section 5.5, “Status
Section 8.2.2,
Section 8.2.2,
Interface”.
Interface”.
August, 2009
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