HIN202ECBZ-T Intersil, HIN202ECBZ-T Datasheet - Page 10

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HIN202ECBZ-T

Manufacturer Part Number
HIN202ECBZ-T
Description
IC 2DRVR/2RCVR RS232 5V 16-SOIC
Manufacturer
Intersil
Type
Transceiverr
Datasheet

Specifications of HIN202ECBZ-T

Package / Case
16-SOIC (0.300", 7.5mm Width)
Mounting Type
Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Number Of Drivers/receivers
2/2
Protocol
RS232
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Detailed Description
The HIN2XXE family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 3. The charge pump contains two sections: the
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generated clock to
generate +10V and -10V. The nominal clock frequency is
125kHz. During phase one of the clock, capacitor C1 is
charged to V
added to V
V
then during phase one, it is inverted with respect to ground
to produce a signal across C4 equal to -2V
pump accepts input voltages up to 5.5V. The output
impedance of the voltage doubler section (V+) is
approximately 200Ω, and the output impedance of the
voltage inverter section (V-) is approximately 450Ω. A typical
application uses 0.1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, increasing the values of the reservoir capacitors, C3
and C4, lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN206E, HIN211E and HIN213E)
the charge pump is turned off, V+ is pulled down to V
is pulled up to GND, and the supply current is reduced to
less than 10µA. The transmitter outputs are disabled and the
receiver outputs (except for HIN213E, R4 and R5) are
placed in the high impedance state.
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of V
1 at the input results in a voltage of between -5V and V- at
the output, and a logic 0 results in a voltage between +5V
CC
OSCILLATOR
. During phase two, C2 is also charged to 2V
GND
V
CC
RC
CC
CC
, producing a signal across C3 equal to twice
. During phase two, the voltage on C1 is
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
S1
S3
VOLTAGE DOUBLER
CC
C1+
C1
10
, or 1.3V for V
+
-
-
C1
S2
S4
CC
CC
. The charge
= 5V. A logic
+
-
CC
C3
FIGURE 3. CHARGE PUMP
, and
CC
V
CC
, V-
V+ = 2V
GND
CC
and (V+ -0.6V). Each transmitter input has an internal 400kΩ
pullup resistor so any unused input can be left unconnected
and its output remains in its low state. The output voltage
swing meets the RS-232C specifications of ±5V minimum
with the worst case conditions of: all transmitters driving 3kΩ
minimum load impedance, V
allowable operating temperature. The transmitters have an
internally limited output slew rate which is less than 30V/µs.
The outputs are short circuit protected and can be shorted to
ground indefinitely. The powered down output impedance is
a minimum of 300Ω with ±2V applied to the outputs and
V
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even if the power is off
(V
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
0V to V
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis (except during shutdown) to improve noise
rejection. The receiver Enable line EN, (EN on HIN213E)
when unasserted, disables the receiver outputs, placing
them in the high impedance mode. The receiver outputs are
also placed in the high impedance state when in shutdown
mode (except HIN213E R4 and R5).
CC
CC
S5
S7
= 0V.
= 0V). The receivers have a typical input threshold of
GND < T
VOLTAGE INVERTER
CC
. The output will be low whenever the input is
T
V
C2+
C2
XIN
XIN
CC
V+
V-
+
-
-
C2
< V
FIGURE 4. TRANSMITTER
CC
S6
S8
400kΩ
CC
= 4.5V, and maximum
+
-
C4
300Ω
V- < V
GND
V
T
-
TOUT
OUT
=
November 4, 2005
-
(V+)
< V+
FN4315.16

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