MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 214
MC68HC711KS2MFN4
Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2MFN4.pdf
(290 pages)
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Timing System
Technical Data
214
CON34 — Concatenate Channels 3 and 4 Bit
CON12 — Concatenate Channels 1 and 2 Bit
PCKA[2:1] — Prescaler for Clock A Bits
PCKB[3:1] — Prescaler for Clock B Bits
Channel 3 is the high-order byte, and channel 4 (port H, bit 3) is
output.
Channel 1 is the high-order byte, and channel 2 (port H, bit 1) is
output.
These bits select the frequency for clock A as shown in
These bits select the frequency for clock B as shown in
0 = Channels 3 and 4 are separate 8-bit PWMs.
1 = Channels 3 and 4 are concatenated to create one 16-bit PWM.
0 = Channels 1 and 2 are separate 8-bit PWMs.
1 = Channels 1 and 2 are concatenated to create one 16-bit PWM.
PCKA[2:1]
PCKB[3:1]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Timing System
0 0
0 1
1 0
1 1
Table 9-8. Clock A Prescaler
Table 9-9. Clock B Prescaler
Clock A Frequency
Clock B Frequency
E/128
E/16
E/32
E/64
E/2
E/4
E/8
E/2
E/4
E/8
E
E
M68HC11K Family
Table
Table
MOTOROLA
9-8.
9-9.
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