MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 237
MC68HC711KS2MFN4
Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2MFN4.pdf
(290 pages)
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11.3.2.4 Memory Mapping Window Control Registers
M68HC11K Family
MOTOROLA
Address: $0058
Address: $0059
Each of the memory mapping window control registers (MM1CR and
MM2CR) determine the active memory bank for the corresponding
window, containing the value to be output on the expansion address
lines when the CPU selects addresses within its extended memory
window. To change banks, write the address of the new bank into the
appropriate window register.
X1A[18:13] — Memory Mapping Window 1 Expansion Address Line
X2A[18:13] — Memory Mapping Window 2 Expansion Address Line
Reset:
Reset:
Read:
Read:
Write:
Write:
Each bit value written to the MMxCR registers is driven on the
corresponding port G expansion address line (if enabled by PGAR) to
enable the specified bank in the window.
Memory Expansion and Chip Selects
Bit 7
0
0
0
0
Figure 11-4. Memory Mapping Window Control
Memory Mapping Window 1 Control Register (MM1CR)
Memory Mapping Window 2 Control Register (MM1CR)
Select Bits
Select Bits
X1A18
X2A18
Registers (MM1CR and MM2CR)
6
0
0
X1A17
X2A17
5
0
0
X1A16
X2A16
4
0
0
Memory Expansion and Chip Selects
X1A15
X2A15
3
0
0
X1A14
X2A14
2
0
0
Memory Expansion
X1A13
X2A13
1
0
0
Technical Data
Bit 0
0
0
0
0
237
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