ispPAC-POWR1220AT8-01T100I Lattice, ispPAC-POWR1220AT8-01T100I Datasheet - Page 9

Supervisory Circuits Prec Prg Pwr Spply S eq. Mon. Mrg Trim I

ispPAC-POWR1220AT8-01T100I

Manufacturer Part Number
ispPAC-POWR1220AT8-01T100I
Description
Supervisory Circuits Prec Prg Pwr Spply S eq. Mon. Mrg Trim I
Manufacturer
Lattice
Series
ispPAC®r

Specifications of ispPAC-POWR1220AT8-01T100I

Number Of Voltages Monitored
12
Undervoltage Threshold
0.8 V
Output Type
Open Collector / Drain
Manual Reset
Not Resettable
Watchdog
No Watchdog
Power-up Reset Delay (typ)
500 ms
Supply Voltage (max)
3.96 V
Supply Voltage (min)
2.8 V
Supply Current (typ)
40 mA
Mounting Style
SMD/SMT
Package / Case
TQFP-100
Applications
General Purpose
Voltage - Input
-0.3 V ~ 5.9 V
Voltage - Supply
2.8 V ~ 3.96 V
Current - Supply
40mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-POWR1220AT8-01T100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Power-On Reset
Figure 1-2. ispPAC-POWR1220ATE Power-On Reset
T
T
T
T
T
V
V
V
C
1. Corresponds to VCCA and VCCD supply voltages.
RST
START
GOOD
BRO
POR
TL
TH
T
Symbol
L
Delay from V
Delay from RESETb HIGH to PLDCLK rising
edge
Power-on reset to valid VMON comparator
output and AGOOD is true
Minimum duration brown out required to trig-
ger RESETb
Delay from brown out to reset state.
Threshold below which RESETb is LOW
Threshold above which RESETb is HIGH
Threshold above which RESETb is valid
Capacitive load on RESETb for master/slave
operation
V
V
V
TH
TL
T
TH
to start-up state
Parameter
Reset
State
T
START
T
RST
Analog Calibration
T
1
1
GOOD
Start Up
1
State
Conditions
1-9
T
T
BRO
POR
ispPAC-POWR1220AT8 Data Sheet
Min.
2.7
0.8
1
RESETb
MCLK
PLDCLK
AGOOD (Internal)
VCC
Typ.
5
Max.
100
200
2.5
2.3
10
13
5
Units
ms
pF
µs
µs
µs
µs
V
V
V

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