SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 44
SAF1760BE/V1,557
Manufacturer Part Number
SAF1760BE/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1760BEV1557.pdf
(110 pages)
Specifications of SAF1760BE/V1,557
Lead Free Status / Rohs Status
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Table 42.
[1]
Table 43.
SAF1760_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 3
2
1
0
The reserved bits should always be written with the reset value.
Symbol
-
ISO_BUF_FILL ISO Buffer Filled:
INT_BUF_FILL
ATL_BUF_FILL ATL Buffer Filled:
Buffer Status register (address 0334h) bit allocation
Buffer Status register (address 0334h) bit description
8.3.6 Buffer Status register
R/W
R/W
R/W
R/W
31
23
15
7
0
0
0
0
The Buffer Status register is used to indicate the HC that a particular PTD buffer (that is,
ATL, INT and ISO) contains at least one PTD that must be scheduled. Once software sets
the Buffer Filled bit of a particular transfer in the Buffer Status register, the HC will start
traversing through PTD headers that are not marked for skipping and are valid PTDs.
Remark: Software can set these bits during the initialization.
Table 42
Description
reserved
1 — Indicates one of the ISO PTDs is filled, and the ISO PTD area will be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of the ISO PTDs will
completely be skipped.
INT Buffer Filled:
1 — Indicates one of the INT PTDs is filled, and the INT PTD area will be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of the INT PTDs will
completely be skipped.
1 — Indicates one of the ATL PTDs is filled, and the ATL PTD area will be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of the ATL PTDs will
completely be skipped.
R/W
R/W
R/W
R/W
30
22
14
6
0
0
0
0
shows the bit allocation of the Buffer Status register.
reserved
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 9 November 2009
[1]
R/W
R/W
R/W
R/W
28
20
12
4
0
0
0
0
reserved
reserved
reserved
[1]
[1]
[1]
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
ISO_BUF_
FILL
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
INT_BUF_
R/W
R/W
R/W
FILL
R/W
25
17
0
0
9
0
1
0
SAF1760
© NXP B.V. 2009. All rights reserved.
ATL_BUF_
FILL
R/W
R/W
R/W
R/W
44 of 110
24
16
0
0
8
0
0
0
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