SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 50
SAF1760BE/V1,557
Manufacturer Part Number
SAF1760BE/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1760BEV1557.pdf
(110 pages)
Specifications of SAF1760BE/V1,557
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Table 53.
Table 54.
[1]
SAF1760_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 24
23
22 to 8
7
6 to 5
4 to 3
2 to 0
[1]
For correct port 1 initialization, write 0080 0018h to this register after power-on.
Symbol
-
PORT1_INIT2
-
PORT1_INIT1
-
PORT1_POWER[1:0] Port 1 Power: Set these bits to 11b. These bits must be set to enable port 1 power.
-
Port 1 Control register (address 0374h) bit allocation
Port 1 Control register (address 0374h) bit description
8.3.12 Port 1 Control register
PORT1_
PORT1_
INIT2
INIT1
R/W
R/W
R/W
R/W
31
23
15
0
1
0
7
0
The values read from the lower 16 bits and the upper 16 bits of this register are always the
same.
R/W
R/W
R/W
R/W
Table 53
30
22
14
0
0
0
6
0
Description
reserved; write reset value
Port 1 Initialization 2: Write logic 1 at the SAF1760 initialization. It will clear both this bit
and bit 7. Affects only port 1.
reserved
Port 1 Initialization 1: Must be reset to logic 0 at power-up initialization for correct
operation of port 1. Correct host controller functionality is not ensured if set to logic 1
(affects only port 1). To clear this bit, logic 1 must be written to bit 23 during the
SAF1760 initialization.
This is not required for the normal functionality of port 2 and port 3.
reserved
reserved; write reset value
reserved
shows the bit allocation of the register.
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 9 November 2009
PORT1_POWER[1:0]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
1
reserved
reserved
reserved
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
26
18
10
0
1
0
2
1
reserved
R/W
R/W
R/W
R/W
25
17
0
1
9
0
1
1
SAF1760
© NXP B.V. 2009. All rights reserved.
R/W
R/W
R/W
R/W
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24
16
0
0
8
0
0
0
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