T7115AMCD LSI, T7115AMCD Datasheet - Page 25

• Manufacturer Part Number: T7115AMCD
• Manufacturer: LSI

Specifications of T7115AMCD

• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Data Sheet
April 1997
Lucent Technologies Inc.
Functional Description
Programming Note: The match bit (MATCH) affects both the transmitter and the receiver. Care should be taken to
correctly program both the transmit idle character and the receive match character before setting MATCH. If the
transmit idle character is programmed to FF hex, the MATCH bit appears to affect only the receiver.
The operation of the receiver in transparent mode is summarized in Table 5.
Table 5. Receiver Operation in Transparent Mode
Diagnostic Modes
Loopbacks
The serial link interface can operate in two diagnostic loopback modes: (1) local loopback and (2) remote loopback.
The local loopback mode is selected when the LLOOP bit is set to 1 in the operation control register (R6—B1). The
remote loopback is selected when the RLOOP bit is set to 1 in the operation control register (R6—B0). For normal
traffic, i.e., to operate the transmitter and receiver independently, the LLOOP bit and the RLOOP bit should both be
cleared to 0. Loopbacks are available in both TDM highway and non-TDM highway modes. Do not simultaneously
attempt local and remote loopbacks.
Either DRA or DRB can be used for receive data, based on the value of the DRA/B bit in register 8 (R8—B7). DXA
or DXB or both can be selected for transmit data, depending on the values programmed for the DXAC and DXBC
bits in register 7 (R7—B6 and R7—B7).
(R0—B7)
HWYEN
0
0
0
1
1
1
(AR11—B4)
ALOCT
X
0
1
X
0
1
(continued)
(AR11—B5)
MATCH
0
1
1
0
1
1
Serial-to-parallel conversion begins with first CLKR after
ENR is set. Data loaded to receive FIFO immediately.
Match user-defined character (AR12) using sliding window.
Byte aligns once character is recognized. No data to
receive FIFO until match is detected.
Match user-defined character (AR12), but only on octet
boundary. Boundary based on first CLKR after ENR set. No
data to receive FIFO until match is detected.
Byte aligns to time slot. No match necessary. Data loaded
to receive FIFO immediately.
Match user-defined character (AR12) using sliding window.
Byte aligns once character is recognized. No data to
receive FIFO until match is detected.
Match user-defined character (AR12) to byte received in
time slot. No data to receive FIFO until match is detected.
T7121 HDLC Interface for ISDN (HIFI-64)
Receiver Operation
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