MT48LC16M16A2P-75 L Micron Technology Inc, MT48LC16M16A2P-75 L Datasheet - Page 38

• Manufacturer Part Number: MT48LC16M16A2P-75 L
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC16M16A2P-75 L

• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 135mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
10. May or may not be bank specific; if all banks need to be precharged, each must be in a
11. Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst, re-
5. The following states must not be interrupted by any executable command; COMMAND
6. All states and sequences not shown are illegal or reserved.
7. Not bank specific; requires that all banks are idle.
8. Does not affect the state of the bank and acts as a NOP to that bank.
9. READs or WRITEs listed in the Command/Action column include READs or WRITEs with
Read with auto precharge enabled: Starts with registration of a READ command
with auto precharge enabled and ends when
bank will be in the idle state.
Write with auto precharge enabled: Starts with registration of a WRITE command
with auto precharge enabled and ends when
bank will be in the idle state.
INHIBIT or NOP commands must be applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
t
Accessing mode register: Starts with registration of a LOAD MODE REGISTER com-
mand and ends when
all banks idle state.
Precharging all: Starts with registration of a PRECHARGE ALL command and ends
when
auto precharge enabled and READs or WRITEs with auto precharge disabled.
valid state for precharging.
gardless of bank.
RFC is met. After
t
RP is met. After
t
RFC is met, the device will be in the all banks idle state.
t
MRD has been met. After
t
RP is met, all banks will be in the idle state.
38
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
t
RP has been met. After
RP has been met. After
t
256Mb: x4, x8, x16 SDRAM
MRD is met, the device will be in the
© 1999 Micron Technology, Inc. All rights reserved.
t
t
RP is met, the
Truth Tables
RP is met, the