ADIS16210/PCBZ Analog Devices Inc, ADIS16210/PCBZ Datasheet - Page 7

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ADIS16210/PCBZ

Manufacturer Part Number
ADIS16210/PCBZ
Description
ADIS16210/PCB EVAL. BD.
Manufacturer
Analog Devices Inc
Series
iSensor™r
Datasheets

Specifications of ADIS16210/PCBZ

Sensor Type
Accelerometer, Inclinometer, 3 Axis
Sensing Range
±180° Roll and Pitch Range, ±90° Gravity Axis, &plusmn1.7 g
Interface
SPI Serial
Sensitivity
±0.21° Relative Accuracy, ±1mg
Voltage - Supply
-
Embedded
No
Utilized Ic / Part
ADIS16210
Silicon Manufacturer
Analog Devices
Kit Application Type
Sensing - Navigation / Position
Application Sub Type
Accelerometer - Three-Axis
Kit Contents
Board, Docs
Silicon Core Number
ADIS16210
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
BASIC OPERATION
The ADIS16210 is an autonomous system that requires no user
initialization. Upon receiving a valid power supply, it initializes
itself and starts sampling, processing, and loading data into the
output registers. When using the factory default configuration,
DIO1 provides a data ready signal. The SPI interface enables
simple integration with many embedded processor platforms,
as shown in Figure 5 (electrical connection) and Table 6 (processor
pin descriptions).
Table 6. Generic Master Processor Pin Names and Functions
Pin Name
SS
IRQ
MOSI
MISO
SCLK
The ADIS16210 SPI interface supports full duplex serial commu-
nication (simultaneous transmit and receive) and uses the bit
sequence shown in Figure 9. Table 7 provides a list of the most
common settings that initialize the serial port of a processor for the
ADIS16210 SPI interface.
Table 7. Generic Master Processor SPI Settings
Processor Setting
Master
SCLK Rate ≤ 830 kHz
SPI Mode 3
MSB-First Mode
16-Bit Mode
SYSTEM
PROCESSOR
SPI MASTER
VDD
DOUT
NOTES
1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
SCLK
Figure 5. Electrical Connection Diagram
DIN
FOR OTHER DEVICES.
CS
I/O LINES ARE COMPATIBLE WITH
SCLK
MOSI
MISO
3.3V OR 5V LOGIC LEVELS
IRQ
Function
Slave select
Interrupt request, optional
Master output, slave input
Master input, slave output
Serial clock
SS
D15
R/W
Description
ADIS16210 operates as a slave
Maximum serial clock rate
CPOL = 1 (polarity), CPHA = 1 (phase)
Bit sequence
Shift register/data length
D14
A6
D13
A5
14
13
11
12
15
CS
SCLK
DIN
DOUT
DIO1
D12
A4
3
1
D11
A3
4
ADIS16210
3.3V
5
D10
A2
2
Figure 9. SPI Communication Bit Sequence
8
A1
D9
A0
D8
Rev. A | Page 7 of 20
DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
D7
D6
D5
READING SENSOR DATA
A single register read requires two 16-bit SPI cycles. The first
cycle requests the contents of a register using the bit assignments
in Figure 9. The register contents then follow on DOUT, during
the second sequence.
Figure 6 includes three single register reads in succession. In
this example, the process starts with DIN = 0x0400 to request
the contents of the XACCL_OUT register, followed by 0x0600
to request the contents of the YACCL_OUT register, and then
0x0800 to request the contents of the ZACCL_OUT register.
Full duplex operation enables processors to use the same 16-bit
SPI cycle to read data from DOUT while requesting the next set
of data on DIN.
Figure 7 provides an example of four SPI signals when reading
PROD_ID in a repeating pattern.
DEVICE CONFIGURATION
The user register map (Table 8) provides a variety of control
registers, which enable optimization for specific applications.
The SPI provides access to these registers, one byte at a time,
using the bit assignments shown in Figure 9. Each register has
16 bits, where Bits[7:0] represent the lower address and Bits[15:8]
represent the upper address. Figure 8 displays the SPI signal
pattern for writing 0x07 to Address 0x38, which sets the number
of averages to 128 and the sample rate to 4 SPS.
DOUT
DIN
D4
DOUT
SCLK
SCLK
DIN
DIN
CS
CS
D3
DIN = 1011 1000 0000 0111 = 0xB807, SET AVG_CNT[7:0] = 0x07
DOUT = 0011 1111 0101 1100 = 0x3F52 = 16210
Figure 7. SPI Read Example, Second 16-Bit Sequence
0x0400
D2
Figure 6. SPI Read Example Remove
Figure 8. Example SPI Write Pattern
D1
XACCL_OUT
D0
0x0600
DIN = 0101 0110 0000 0000 = 0x5600
D15
YACCL_OUT
R/W
0x0800
D14
A6
D13
A5
ADIS16210
ZACCL _OUT

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