PIC32MX440F512H-80V/MR Microchip Technology, PIC32MX440F512H-80V/MR Datasheet - Page 89
![512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX440F512H-80V/MR
Manufacturer Part Number
PIC32MX440F512H-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/MR
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
32 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
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7.0
FIGURE 7-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note:
2: Some registers and associated bits
INTERRUPT CONTROLLER
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 8. “Interrupt
Controller” (DS61108) of the “PIC32
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Several of the registers cited in this section are not in the interrupt controller module. These registers (and
bits) are associated with the CPU. Details about them are available in
To avoid confusion, a typographic distinction is made for registers in the CPU. The register names in this
section, and all other sections of this manual, are signified by uppercase letters only. The CPU register
names are signified by upper and lowercase letters. For example, INTSTAT is an Interrupts register;
whereas, IntCtl is a CPU register.
INTERRUPT CONTROLLER MODULE
Interrupt Controller
in
Shadow Set Number
Vector Number
Priority Level
PIC32MX3XX/4XX devices generate interrupt requests
in response to interrupt events from peripheral mod-
ules. The Interrupt Control module exists externally to
the CPU logic and prioritizes the interrupt events before
presenting them to the CPU.
The PIC32MX3XX/4XX interrupts module includes the
following features:
• Up to 96 interrupt sources
• Up to 64 interrupt vectors
• Single and Multi-Vector mode operations
• Five external interrupts with edge polarity control
• Interrupt proximity timer
• Module Freeze in Debug mode
• Seven user-selectable priority levels for each
• Four user-selectable subpriority levels within each
• Dedicated shadow set for highest priority level
• Software can generate any interrupt
• User-configurable interrupt vector table location
• User-configurable interrupt vector spacing
vector
priority
PIC32MX3XX/4XX
Section 3.0
CPU Core
“CPU”.
DS61143H-page 89
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