PIC32MX440F512H-80V/PT Microchip Technology, PIC32MX440F512H-80V/PT Datasheet - Page 133
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PIC32MX440F512H-80V/PT
Manufacturer Part Number
PIC32MX440F512H-80V/PT
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/PT
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX440F512H-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 133 of 214
- Download datasheet (5Mb)
REGISTER 26-2:
© 2011 Microchip Technology Inc.
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-24 Reserved: Write ‘1’
bit 23
bit 22-21 Reserved: Write ‘1’
bit 20-16 WDTPS<4:0>: Watchdog Timer Postscale Select bits
bit 15-14 FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
Note 1:
Range
31:24
23:16
15:8
Bit
7:0
FWDTEN: Watchdog Timer Enable bit
1 = The WDT is enabled and cannot be disabled by software
0 = The WDT is not enabled; it can be enabled in software
10100 = 1:1048576
10011 = 1:524288
10010 = 1:262144
10001 = 1:131072
10000 = 1:65536
01111 = 1:32768
01110 = 1:16384
01101 = 1:8192
01100 = 1:4096
01011 = 1:2048
01010 = 1:1024
01001 = 1:512
01000 = 1:256
00111 = 1:128
00110 = 1:64
00101 = 1:32
00100 = 1:16
00011 = 1:8
00010 = 1:4
00001 = 1:2
00000 = 1:1
All other combinations not shown result in operation = ‘10100’
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Do not disable P
31/23/15/7
FWDTEN
IESO
Bit
R/P
R/P
R/P
—
r-1
FCKSM<1:0>
DEVCFG1: DEVICE CONFIGURATION WORD 1
30/22/14/6
OSC
Bit
R/P
r-1
—
r-1
—
r-1
—
(POSCMOD = 00) when using this oscillator source.
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
FSOSCEN
29/21/13/5
Bit
R/P
R/P
r-1
—
—
r-1
FPBDIV<1:0>
28/20/12/4
Bit
R/P
R/P
—
—
r-1
r-1
P = Programmable bit
27/19/11/3
Bit
R/P
—
—
—
r-1
r-1
r-1
PIC32MX3XX/4XX
WDTPS<4:0>
OSCIOFNC
26/18/10/2
Bit
R/P
R/P
R/P
—
r-1
FNOSC<2:0>
r = Reserved bit
25/17/9/1
POSCMOD<1:0>
Bit
R/P
R/P
R/P
r-1
—
DS61143H-page 133
24/16/8/0
Bit
R/P
R/P
R/P
r-1
—
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