PIC32MX440F512H-80V/PT Microchip Technology, PIC32MX440F512H-80V/PT Datasheet - Page 178
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PIC32MX440F512H-80V/PT
Manufacturer Part Number
PIC32MX440F512H-80V/PT
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.TDGL001.pdf
(214 pages)
Specifications of PIC32MX440F512H-80V/PT
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX440F512H-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC32MX3XX/4XX
TABLE 29-33: I2Cx BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
DS61143H-page 178
AC CHARACTERISTICS
IS10
IS11
IS20
IS21
IS25
IS26
IS30
IS31
IS33
IS34
IS40
IS45
IS50
Note 1:
Param.
No.
T
T
T
T
T
T
T
T
T
T
T
T
C
Symbol
SU
SU
SU
AA
Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
LO
HI
F
R
HD
HD
HD
BF
B
:
:
:
SCL
SCL
:
:
:
:
:
:
SCL
:
:
:
SCL
DAT
STA
STO
SDA
SCL
DAT
STA
STO
Clock Low Time
Clock High Time
SDAx and SCLx
Fall Time
SDAx and SCLx
Rise Time
Data Input
Setup Time
Data Input
Hold Time
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
Output Valid from
Clock
Bus Free Time
Bus Capacitive Loading
Characteristics
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
20 + 0.1 C
20 + 0.1 C
4700
4000
4000
4000
Min.
250
100
100
600
250
600
250
600
600
600
250
4.7
1.3
0.5
4.0
0.6
0.5
4.7
1.3
0.5
—
—
—
—
—
0
0
0
0
0
0
B
B
Max.
1000
3500
1000
300
300
100
300
300
350
0.9
0.3
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
pF
μs
μs
μs
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
μs
-40°C ≤ T
-40°C ≤ T
© 2011 Microchip Technology Inc.
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
C
10 to 400 pF.
C
10 to 400 pF.
Only relevant for Repeated
Start condition.
After this period, the first
clock pulse is generated.
The amount of time the bus
must be free before a new
transmission can start.
B
B
A
A
is specified to be from
is specified to be from
≤ +85°C for Industrial
≤ +105°C for V-Temp
Conditions
—
—
—
—
—
—
—
—
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