ADV7177KS-REEL Analog Devices Inc, ADV7177KS-REEL Datasheet

IC DAC VIDEO NTSC 3-CH 44MQFP

ADV7177KS-REEL

Manufacturer Part Number
ADV7177KS-REEL
Description
IC DAC VIDEO NTSC 3-CH 44MQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7177KS-REEL

Rohs Status
RoHS non-compliant
Applications
Set-Top Boxes, TV
Voltage - Supply, Analog
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
MQFP
Pin Count
44
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
FEATURES
ITU-R BT601/656 YCrCb to PAL/NTSC video encoder
High quality, 9-bit video DACs
Integral nonlinearity <1 LSB at 9 bits
NTSC-M, PAL-M/N, PAL-B/D/G/H/I
Single 27 MHz crystal/clock required (±2 oversampling)
75 dB video SNR
32-bit direct digital synthesizer for color subcarrier
Multistandard video output support:
Video input data port supports:
Full video output drive or low signal drive capability
Programmable simultaneous composite and S-VHS
Programmable luma filters (low-pass/notch/extended)
Programmable VBI (vertical blanking interval)
Programmable subcarrier frequency and phase
Programmable luma delay
Individual on/off control of each DAC
CCIR and square pixel operation
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Composite (CVBS)
Component S-video (Y/C)
Component YUV or RGB
CCIR-656 4:2:2 8-bit parallel input format
4:2:2 16-bit parallel input format
34.7 mA max into 37.5 Ω (doubly terminated 75 R)
5 mA min with external buffers
(VHS) Y/C or RGB (SCART)/YUV video outputs
FIELD/VSYNC
OSD_EN
ADV7177
P15–P8
COLOR
HSYNC
BLANK
OSD_0
OSD_1
OSD_2
ONLY
DATA
P7–P0
CLOCK CLOCK CLOCK/2
POLATOR
4:2:2 TO
INTER-
4:4:4
V
AA
VIDEO TIMING
GENERATOR
8
8
8
MATRIX
YCrCb
YUV
TO
8
8
8
RESET
ADV7177/ADV7178
BURST
BURST
SYNC
ADD
ADD
ADD
FUNCTIONAL BLOCK DIAGRAM
SCLOCK SDATA ALSB
8
8
8
I
2
C MPU PORT
POLATOR
POLATOR
POLATOR
INTER-
INTER-
INTER-
Figure 1.
8
8
8
LOW-PASS
LOW-PASS
LOW-PASS
FILTER
FILTER
FILTER
Color-signal control/burst-signal control
Interlaced/noninterlaced operation
Complete on-chip video timing generator
OSD support (ADV7177 only)
Programmable multimode master/slave operation
Macrovision AntiTaping Rev. 7.01 (ADV7178 only)
Closed captioning support
On-board voltage reference
2-wire serial MPU interface (I
Single-supply 5 V or 3 V operation
Small 44-lead MQFP package
Synchronous 27 MHz/13.5 MHz clock output
APPLICATIONS
MPEG-1 and MPEG-2 video, DVD, digital satellite,
1
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Y
U
V
only, which is its sole intended use in the device. Please contact sales office
for latest Macrovision version available. ITU-R and CCIR are used inter-
changeably in this document (ITU-R has replaced CCIR recommendations).
The Macrovision anticopy process is licensed for noncommercial home use
cable systems (set-top boxes/IRDs), digital TVs,
CD video/karaoke, video games, PC video/multimedia
9
9
Integrated Digital CCIR-601
to PAL/NTSC Video Encoder
DDS BLOCK
SIN/COS
9
9
YUV TO
MATRIX
RBG
9
© 2005 Analog Devices, Inc. All rights reserved.
GND
ADV7177/ADV7178
REFERENCE
2
VOLTAGE
C®-compatible)
CIRCUIT
9
9
9
9-BIT
9-BIT
9-BIT
DAC
DAC
DAC
www.analog.com
DAC A
(PIN 31)
DAC B
(PIN 27)
DAC C
(PIN 26)
V
R
COMP
REF
SET
1

Related parts for ADV7177KS-REEL

ADV7177KS-REEL Summary of contents

Page 1

FEATURES ITU-R BT601/656 YCrCb to PAL/NTSC video encoder High quality, 9-bit video DACs Integral nonlinearity <1 LSB at 9 bits NTSC-M, PAL-M/N, PAL-B/D/G/H/I Single 27 MHz crystal/clock required (±2 oversampling video SNR 32-bit direct digital synthesizer for color ...

Page 2

ADV7177/ADV7178 TABLE OF CONTENTS General Description ......................................................................... 4 Specifications..................................................................................... Specifications ......................................................................... 5 3.3 V Specifications ...................................................................... Dynamic Specifications........................................................ 7 3.3 V Dynamic Specifications..................................................... Timing Specifications ........................................................... 9 3.3 V Timing Specifications ...

Page 3

REVISION HISTORY 3/05—Rev Rev. C Updated Format.................................................................. Universal Changes to Figure 6.........................................................................13 Changes to Subcarrier Frequency Register 3–0 Section ............28 Changes to Register Values Section ..............................................40 Updated Outline Dimensions........................................................43 Changes to Ordering Guide...........................................................43 3/02—Rev Rev. B ...

Page 4

ADV7177/ADV7178 GENERAL DESCRIPTION The ADV7177/AD7178 are integrated digital video encoders that convert digital CCIR-601 4:2 16-component video data into a standard analog baseband television signal compatible with worldwide standards. The 4:2:2 YUV video data is interpolated to 2× ...

Page 5

SPECIFICATIONS 5 V SPECIFICATIONS ± 5 1.235 300 Ω. All specifications T AA REF SET Table 1. Parameter 3 STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential ...

Page 6

ADV7177/ADV7178 3.3 V SPECIFICATIONS 3 3 1.235 REF SET Table 2. Parameter Conditions 3 STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential Nonlinearity Guaranteed monotonic ...

Page 7

V DYNAMIC SPECIFICATIONS 4. 5. 1.235 REF Table 3. Parameter FILTER CHARACTERISTICS 3 Luma Bandwidth (Low-Pass Filter) Stop-Band Cutoff Pass-Band Cutoff Chroma Bandwidth Stop-Band Cutoff ...

Page 8

ADV7177/ADV7178 3.3 V DYNAMIC SPECIFICATIONS 3 3 1.235 REF SET Table 4. Parameter FILTER CHARACTERISTICS 3 Luma Bandwidth (Low-Pass Filter) Stop-Band Cutoff Pass-Band Cutoff Chroma Bandwidth ...

Page 9

V TIMING SPECIFICATIONS 4. 5. 1.235 REF Table 5. Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulse Width SCLOCK Low Pulse Width ...

Page 10

ADV7177/ADV7178 3.3 V TIMING SPECIFICATIONS 3.0 V–3 1.235 REF SET Table 6. Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulse Width SCLOCK Low Pulse Width ...

Page 11

SDATA t 6 SCLOCK t 2 Figure 2. MPU Port Timing Diagram CLOCK HSYNC, CONTROL FIELD/VSYNC, I/PS BLANK PIXEL INPUT Cb Y DATA HSYNC, CONTROL FIELD/VSYNC, O/PS BLANK Figure 3. Pixel and Control Data ...

Page 12

ADV7177/ADV7178 ABSOLUTE MAXIMUM RATINGS STRESS RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those ...

Page 13

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 9. Pin Function Descriptions Pin No. Mnemonic I/O Function 1, 20, 28 Power Supply CLOCK/2 O Synchronous Clock Output Signal. Can be either 27 MHz or 13.5 MHz; this ...

Page 14

ADV7177/ADV7178 TYPICAL PERFORMANCE CHARACTERISTICS 0 –10 TYPE A –20 –30 –40 –50 – FREQUENCY (MHz) Figure 7. NTSC Low-Pass Filter 0 –10 –20 –30 –40 –50 – FREQUENCY (MHz) Figure ...

Page 15

FREQUENCY (MHz) Figure 13 . PAL UV Filter 12 Rev Page ADV7177/ADV7178 ...

Page 16

ADV7177/ADV7178 THEORY OF OPERATION DATA PATH DESCRIPTION For PAL and NTSC M, N modes, YCrCb 4:2:2 data is input via the CCIR-656-compatible pixel port MHz data rate. The pixel data ...

Page 17

VIDEO TIMING DESCRIPTION The ADV7177/ADV7178 are intended to interface to off-the- shelf MPEG1 and MPEG2 decoders. Consequently, the ADV7177/ADV7178 accept 4:2:2 YCrCb pixel data via a CCIR-656 pixel port, and have several video timing modes allowing them to be configured ...

Page 18

ADV7177/ADV7178 TIMING AND CONTROL Mode 0 (CCIR-656): Slave Option Timing Register 0 TR0 = The ADV7177/ADV7178 are controlled by the start active video (SAV) and end active video (EAV) time codes in ...

Page 19

DISPLAY 622 623 624 625 EVEN FIELD ODD FIELD DISPLAY 309 310 311 312 313 ODD FIELD EVEN FIELD ANALOG VIDEO Figure 17. Timing Mode 0 Data Transitions (Master Mode) ...

Page 20

ADV7177/ADV7178 Mode 1: Slave Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accepts horizontal SYNC and odd/even FIELD signals. A transition of the FIELD ...

Page 21

Mode 1: Master Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 can generate horizontal SYNC and odd/even FIELD signals. A transition of the FIELD ...

Page 22

ADV7177/ADV7178 Mode 2: Slave Option HSYNC , VSYNC , BLANK Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accept horizontal and vertical SYNC signals. A coincident low transition of both ...

Page 23

Mode 2: Master Option HSYNC , VSYNC , BLANK Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 can generate horizontal and vertical SYNC signals. A coincident low transition of both ...

Page 24

ADV7177/ADV7178 Mode 3: Master/Slave Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accept or generate ...

Page 25

POWER-ON RESET After power-up necessary to execute a reset operation. A reset occurs on the falling edge of a high-to-low transition on the RESET pin. This initializes the pixel port so that the pixel inputs P0, ...

Page 26

ADV7177/ADV7178 Stop and start conditions can be detected at any stage during the data transfer. If these conditions are asserted out of sequence with normal read and write operations, they cause an immediate jump to the idle condition. During a ...

Page 27

REGISTERS REGISTER ACCESS The MPU can write to or read from all of the ADV7177 and ADV7178 registers except the subaddress register, which is a write-only register. The subaddress register determines which register the next read or write operation accesses. ...

Page 28

ADV7177/ADV7178 MR07 OUTPUT SELECT MR06 0 YC OUTPUT 1 RGB/YUV OUTPUT MR07 ZERO SHOULD BE WRITTEN TO THIS BIT MR17 ONE SHOULD BE WRITTEN TO COLOR BAR CONTROL MR17 0 DISABLE 1 ENABLE Output Select (MR06) This bit specifies if ...

Page 29

Program as FSC Register 0: 1Fh FSC Register 2: 7Ch FSC Register 3: F0h FSC Register 4: 21h Figure 34 shows how the frequency is set up by the four registers. SUBCARRIER FSC31 FSC30 FSC29 FSC28 FSC27 FREQUENCY REG 3 ...

Page 30

ADV7177/ADV7178 TIMING REGISTER 1 (TR17–TR10) Address [SR4–SR0] = 0CH Timing Register 8-bit-wide register. Figure 38 shows the various operations under the control of Timing Register 1. This register can be read from as well as written to. ...

Page 31

MR2 BIT DESCRIPTION Square Pixel Control (MR20) This bit is used to set up square pixel mode. This is available in slave mode only. For NTSC, a 24.5454 MHz clock must be supplied. For PAL, a 29.5 MHz clock must ...

Page 32

ADV7177/ADV7178 OSD REGISTER 0–11 Address [SR4–SR0] = 13H–1EH There are 12 OSD registers as shown in Figure 42. There are four bits for each Y, Cb, and Cr value, and there are four zeros added to give the complete byte ...

Page 33

BOARD DESIGN AND LAYOUT CONSIDERATIONS The ADV7177/ADV7178 are highly integrated circuits containing both precision analog circuitry and high speed digital circuitry. The parts have been designed to minimize interference effects on the integrity of the analog circuitry by the high ...

Page 34

ADV7177/ADV7178 OSD INPUTS 3–10, 12–14 PIXEL DATA UNUSED 4kΩ INPUTS RESET SHOULD BE GROUNDED 100nF 27MHz 33pF XTAL 33pF 27MHz OR 13.5MHz CLOCK OUTPUT POWER SUPPLY DECOUPLING FOR EACH POWER SUPPLY GROUP 0.1µ ...

Page 35

CLOSED CAPTIONING The ADV7177/ADV7178 support closed captioning, which conforms to the standard television synchronizing waveform for color transmission. Closed captioning is transmitted during the blanked active line time of Line 21 of the odd fields and Line 284 of even ...

Page 36

ADV7177/ADV7178 WAVEFORM ILLUSTRATIONS NTSC WAVEFORMS WITH PEDESTAL 130.8 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 963.8mV 286mVp-p 650mV 335.2mV 0mV 100 IRE 7.5 IRE 0 IRE –40 IRE 714.2mV Figure ...

Page 37

NTSC WAVEFORMS WITHOUT PEDESTAL 130.8 IRE 100 IRE 0 IRE –40 IRE 100 IRE 0 IRE –40 IRE 286mVp-p 0mV 100 IRE 0 IRE –40 IRE 714.2mV BLANK/BLACK LEVEL Figure 49. NTSC Composite Video Levels 714.2mV BLANK/BLACK LEVEL Figure 50. ...

Page 38

ADV7177/ADV7178 PAL WAVEFORMS 1284.2mV 1047.1mV 350.7mV 50.8mV 1047mV 350.7mV 50.8mV 989.7mV 300mVp-p 650mV 317.7mV 0mV 1050.2mV 351.8mV 51mV 696.4mV Figure 53. PAL Composite Video Levels 696.4mV Figure 54. PAL Luma Video Levels 672mVp-p Figure 55. PAL Chroma Video Levels 698.4mV ...

Page 39

UV WAVEFORMS 334mV 171mV BETACAM LEVEL 0mV –171mV –334mV –505mV Figure 57. NTSC 100% Color Bars Without Pedestal, U Levels 309mV 158mV BETACAM LEVEL 0mV –158mV –309mV –467mV Figure 58. NTSC 100% Color Bars With Pedestal, U Levels 232mV 118mV ...

Page 40

ADV7177/ADV7178 REGISTER VALUES The ADV7177/ADV7178 registers can be set depending on the user standard required. The following examples give the various register formats for several video standards. In each case the output is set to com- posite output with all ...

Page 41

OPTIONAL OUTPUT FILTER If an output filter is required for the CVBS, Y, UV, Chroma, and RGB outputs of the ADV7177/ADV7178, the filter in Figure 63 can be used. Plots of the filter characteristics are shown in Figure 64. An ...

Page 42

ADV7177/ADV7178 OPTIONAL DAC BUFFERING For external buffering of the ADV7177/ADV7178 DAC outputs, the configuration in Figure 65 is recommended. This configuration shows the DAC outputs running at half (18 mA) their full-current (34.7 mA) capability. This allows the devices to ...

Page 43

... OUTLINE DIMENSIONS 2.10 2.00 1.95 0.25 MIN VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range ADV7177KS 0°C to 70°C ADV7177KS-REEL 0°C to 70°C 1 ADV7177KSZ 0°C to 70°C ADV7177KSZ-REEL 1 0°C to 70°C ADV7178KS 0°C to 70°C ADV7178KS-REEL 0°C to 70° Pb-free part ...

Page 44

ADV7177/ADV7178 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00228–0-3/05(C) Rev Page ...

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