PCA8574APW,112 NXP Semiconductors, PCA8574APW,112 Datasheet
PCA8574APW,112
Specifications of PCA8574APW,112
935283759112
PCA8574APW
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PCA8574APW,112 Summary of contents
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PCA8574/74A Remote 8-bit I/O expander for I Rev. 02 — 14 May 2007 1. General description The PCA8574/74A provide general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional I data (SDA)). The devices consist of an ...
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... NXP Semiconductors I Cellular telephones I Gaming machines I Instrumentation and test measurement 4. Ordering information Table 1. Ordering information Type number Topside Package mark Name PCA8574D PCA8574D SO16 PCA8574AD PCA8574AD PCA8574N PCA8574N DIP16 PCA8574AN PCA8574AN PCA8574PW PCA8574 TSSOP16 PCA8574APW PA8574A PCA8574TS PCA8574 SSOP20 PCA8574ATS PCA8574A 5 ...
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... NXP Semiconductors data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram Pinning information 6.1 Pinning Fig 3. Pin configuration for DIP16 PCA8574_PCA8574A_2 Product data sheet Remote 8-bit I/O expander for I write pulse power-on reset read pulse PCA8574N PCA8574AN ...
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... NXP Semiconductors AD0 AD1 AD2 Fig 5. Pin configuration for TSSOP16 6.2 Pin description Table 2. Symbol AD0 AD1 AD2 INT SCL SDA V DD PCA8574_PCA8574A_2 Product data sheet Remote 8-bit I/O expander for SDA 3 14 SCL 4 13 INT PCA8574PW PCA8574APW 002aac941 Pin description for DIP16, SO16, TSSOP16 ...
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... NXP Semiconductors Table 3. Symbol INT SCL n.c. SDA V DD AD0 AD1 n.c. AD2 n. n. PCA8574_PCA8574A_2 Product data sheet Remote 8-bit I/O expander for I Pin description for SSOP20 Pin Description 1 interrupt output (active LOW) 2 serial clock line 3 not connected 4 serial data line ...
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... NXP Semiconductors 7. Functional description Refer to 7.1 Device address Following a START condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). The address of the PCA8574/74A is shown in 8 slave addresses. To conserve power, no internal pull-up resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in Table 4 “ ...
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... NXP Semiconductors Table I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA8574/74A’s 8 ports (see either as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see the Write mode (see This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions ...
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... NXP Semiconductors SCL slave address SDA START condition write to port data output from port P5 output voltage P5 pull-up output current INT Fig 8. Write mode (output) 8.3 Reading from a port (Input mode) All ports programmed as input should be set to logic 1. To read, the master (microcontroller) fi ...
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... NXP Semiconductors 8.4 Power-on reset When power is applied to V PCA8574/74A in a reset condition until V condition is released and the PCA8574/74A registers and I will initialize to their default states. Thereafter V the device. 8.5 Interrupt output (INT) The PCA8574/74A provides an open-drain interrupt (INT) which can be fed to a ...
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... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 13. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...
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... NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P2 to P7) ...
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... NXP Semiconductors 11. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot P/out T stg T amb [1] Total package (maximum) output current is 400 mA. PCA8574_PCA8574A_2 Product data sheet Remote 8-bit I/O expander for I Limiting values Parameter supply voltage supply current ...
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... NXP Semiconductors 12. Static characteristics Table 7. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...
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... NXP Semiconductors 13. Dynamic characteristics Table 8. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and START BUF condition t hold time (repeated) START condition HD;STA t set-up time for a repeated START condition SU;STA t set-up time for STOP condition SU ...
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... NXP Semiconductors START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 17. I C-bus timing diagram PCA8574_PCA8574A_2 Product data sheet Remote 8-bit I/O expander for I bit 7 bit 6 MSB (A6) (A7 LOW HIGH 1 /f SCL SU;DAT HD;DAT and V ...
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... NXP Semiconductors 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil); long body pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.7 0.51 3.7 inches 0.19 0.02 0.15 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.4 mm 1.5 0.25 0 1.2 Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION IEC SOT266-1 Fig 21. Package outline SOT266-1 (SSOP20) ...
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... NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering 16.1 Introduction There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fi ...
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... NXP Semiconductors packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 9 Table 9. Package thickness (mm) < 2.5 2.5 Table 10. Package thickness (mm) < 1.6 1.6 to 2.5 > 2.5 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during refl ...
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... NXP Semiconductors 16.3.2 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. ...
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... NXP Semiconductors Table 11. Suitability of IC packages for wave, reflow and dipping soldering methods Mounting Package Surface mount BGA, HTSSON..T LFBGA, SQFP, SSOP..T VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS [7] PLCC LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN ...
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... NXP Semiconductors 17. Abbreviations Table 12. Acronym CDM CMOS ESD GPIO HBM LED C-bus ID LSB MM MSB PLC PWM RAID SMBus 18. Revision history Table 13. Revision history Document ID Release date PCA8574_PCA8574A_2 20070514 • Modifications: • • • • • PCA8574_PCA8574A_1 20070117 PCA8574_PCA8574A_2 Product data sheet ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 Address maps I/O programming . . . . . . . . . . . . . . . . . . . . . . . . 7 8.1 Quasi-bidirectional I/O architecture . . . . . . . . . 7 8.2 Writing to the port (Output mode ...