SI2401-FS Silicon Laboratories Inc, SI2401-FS Datasheet

IC ISOMODEM SYSTEM-SIDE 16SOIC

SI2401-FS

Manufacturer Part Number
SI2401-FS
Description
IC ISOMODEM SYSTEM-SIDE 16SOIC
Manufacturer
Silicon Laboratories Inc
Type
Integrated Global DAAr
Datasheets

Specifications of SI2401-FS

Package / Case
16-SOIC (3.9mm Width)
Data Format
V.21, V.22, V.23, Bell 103, Bell 212A
Baud Rates
2.4k
Interface
UART
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
15 mA
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Package
16SOIC
Main Category
Chipset
Sub-category
ISOmodem
Maximum Data Rate
2.4 Kbps
Typical Operating Supply Voltage
3.3 V
Power Supply Type
Digital
Typical Supply Current
10 mA
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1167 - BOARD EVAL SI2401 UART INTERFACE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1095

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V. 22
Features
Applications
Description
The Si2401 ISOmodem
Silicon Labs’ third-generation direct access arrangement (DAA), which provides a
globally-programmable telephone line interface with an unprecedented level of
integration. Available in two 16-pin SOIC packages, this compact solution
eliminates the need for a separate DSP data pump, modem controller, codec,
isolation transformer, relay, opto-isolators, and 2–4 wire hybrid. The Si2401
provides conventional data formats at connect rates of up to 2400 bps with full-
duplex operation over the Public Switched Telephone Network (PSTN).
Additionally, the Si2401 is fully-programmable to meet global standards with a
single design. Other features include fast connect times for electronic point-of-
sale (EPOS) applications and alarm protocols for security systems. The device is
ideal for embedded modem applications due to its small size, low external
component count, and low power consumption.
Functional Block Diagram
Rev. 1.0 12/05
EOFR/GPIO1
ESC/GPIO3
INT/GPIO4
CD/GPIO2
Data modem formats
27 MHz CLKIN support
Caller ID detection and decoding
UART with flow control
Set-top boxes
Point-of-sale
RI/GPIO5
RESET
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
2400 bps: V.22bis
1200 bps: V.22, V.23, Bell 212A
300 bps: V.21, Bell 103
Fast connect and V.23 reversing
SIA and other security protocols
XTALI
XOUT
RXD
TXD
CTS
B I S
Interface
Control
Interface
Clock
I S O
®
Si2401
(Data Pump)
is a complete, two-chip 2400 bps modem integrating
Call Progress)
(AT Decoder,
µ Controller
M O D E M
DSP
ATM terminals
Security systems
Copyright © 2005 by Silicon Laboratories
Integrated third-generation DAA
AT command set support
Call progress support
3.3 V Power
Lead-free, RoHS-compliant
packages
®
Fewer external components required
Over 5000 V capacitive isolation
Parallel phone detect
Globally-compliant line interface
Isolation
Interface
W I T H
Si3010
Terminations
Medical monitoring
Power meters
Hybrid, AC
Ring Detect
and DC
Off-Hook
I
N T E G R A T E D
IB
RX
SC
DCT
QB
QE
QE2
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
U.S. Patent #5,870,046
U.S. Patent #6,061,009
Other patents pending
CLKIN/XTALI
GPIO5/RI
VREG
RNG1
G
XTALO
RESET
DCT
C2B
Ordering Information
C1B
QE
RX
RXD
TXD
CTS
IB
Pin Assignments
V
L O B A L
D
See page 72.
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Si3010
Si2401
Si2401
16
15
14
13
12
11
10
16
15
14
13
12
11
10
9
9
GPIO4/INT/AOUT
D A A
GPIO1/EOFR
GPIO2/CD
GPIO3/ESC
GND
C1A
C2A
V
DCT2
IGND
DCT3
QE2
SC
RNG2
A
QB
VREG2
Si2401

Related parts for SI2401-FS

SI2401-FS Summary of contents

Page 1

... Public Switched Telephone Network (PSTN). Additionally, the Si2401 is fully-programmable to meet global standards with a single design. Other features include fast connect times for electronic point-of- sale (EPOS) applications and alarm protocols for security systems. The device is ideal for embedded modem applications due to its small size, low external component count, and low power consumption ...

Page 2

... Si2401 2 Rev. 1.0 ...

Page 3

... Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3. Bill of Materials: Si2401/10 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2. Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3. Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4. Global DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.5. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6. Interrupt Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.7. V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 ...

Page 4

... All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated. 3. The digital supply operates from 3.0 to 3.6 V. The Si2401 interface supports 5 V logic (CLKIN/XTALI supports 3 logic only). ...

Page 5

... ILIM = DCV = 11, MINI = 00, DCR = mA, ILIM = DCV = 11, MINI = 00, DCR = – MINI = 00, ILIM = MINI = 00, ILIM = current flowing through ring detection circuitry Rev. 1.0 Si2401 Min Typ Max Unit — — 6 — — V — — 7 — — V — — 7 — — V — — — ...

Page 6

... Si2401 * Table 3. DC Characteristics for F-Grade (V = 3 70° Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1–4 Input Leakage Current Pullup Resistance Pins 5, 7, 11, 14 Power Supply Current, Digital ...

Page 7

... L THD ILIM = 0, DCV = 00, MINI = 11 DCR = THD ILIM = 0, DCV = 00, MINI = 11 DCR = THD ILIM = 1,DCV = 11, MINI=00 DCR = VIN = 1 kHz, –13 dBm CID Rev. 1.0 Si2401 Min Typ Max Unit — 8 — kHz — 4.9152 — MHz — 27 — MHz — 5 — Hz — ...

Page 8

... Si2401 Table 5. Absolute Maximum Ratings Parameter DC Supply Voltage Input Current, Si2401 Digital Input Pins Digital Input Voltage CLKIN/XTALI Input Voltage Operating Temperature Range Storage Temperature Range Note: Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet ...

Page 9

... Note: Baud rates (programmed through register SE0) are as follows: 300,1200, 2400, 9600, 19200, 38400, 115200, and 307200 Hz. Figure 2. Asynchronous UART Serial Interface Timing Diagram ) Symbol Min – csb Receive Timing Transmit Timing Rev. 1.0 Si2401 Typ Max Unit — — — ns — — ms — — 2 0 Stop Stop Stop Stop 9 ...

Page 10

... Si2401 2. Typical Application Schematic GND Rev. 1 IGND 15 ...

Page 11

... Bill of Materials: Si2401/10 Chipset Component C1 C5, C6, C50 C7 C8, C9 C10 1 C40, C41 C51 2 D1, D2 Dual Diode, 225 mA, 300 V, CMPD2004S FB1, FB2 Q1 Q4, Q5 RV1 R5 R10 R11 R12, R13 3 R15, R16 U1 U2 4.9152 MHz, 20 pF, 100 ppm, 150 Ω ESR 1 Notes STB applications, C40, C41, and Y1 can be removed when using the 27 MHz clock input feature. See " ...

Page 12

... SIA—Pulse SIA Format *Note: The Si2401 only adjusts its DCE rate from 2400 bps to 1200 bps connecting to a V.22-only (1200 bps only) modem. Because the V.22bis specification does not outline a fallback procedure, the host should implement a fallback mechanism consisting of hanging up and connecting at a lower baud rate. Retraining to accommodate changes in line conditions that occur during a call must be implemented by terminating the call and redialing ...

Page 13

... See Table 12 on page 24 for the response code summary. 4.2. Configurations and Data Rates The Si2401 can be configured to any of the Bell and CCITT operation modes listed in Table 9. When configured for V.22bis, the modem connects at 1200 bps if the far end modem is configured for V.22. ...

Page 14

... LSB, first at the DTE rate determined by the S-Register SE0[2:0] (SD) setting, and terminates with a stop bit. After the middle of the stop bit time, the Si2401 begins looking for a logic 1 to logic 0 transition signaling the start of the next character on TXD to be sent to the line (remote modem) ...

Page 15

... Wake-Up-On-Ring. By issuing the ATz command, the Si2401 goes into a low-power mode where both the microcontroller and DSP are powered down. Only an incoming ring, a low TXD signal total reset will power up the chip again. Return from wake-on-ring triggers the INT pin if S09[6] Table 10 ...

Page 16

... Si2401 Table 10. Country-Specific Register Settings Si2401 Register Country OHS Croatia 10 Cyprus (EU) 10 Czech Republic (EU) 10 Denmark (EU) 10 Dominican Republic 00 Dubai 00 Equador 00 Egypt 10 El Salvador 00 Estonia (EU) 10 Finland (EU) 10 France (EU) 10 Georgia 00 Germany (EU) 10 Ghana 10 Greece (EU) 10 Guadeloupe 10 Guam 00 Hong Kong 00 Hungary (EU) ...

Page 17

... Table 10. Country-Specific Register Settings Si2401 Register Country OHS Korea 00 Kuwait 00 Kyrgyzstan 00 Latvia (EU) 10 Lebanon 10 Lesotho 00 Liechtenstein (CTR-21) 10 Lithuania (EU) 10 Luxembourg (EU) 10 Macao 00 Malaysia 00 Malta (EU) 10 Martinique 10 Mexico 00 Moldova 00 Morocco 10 Netherlands (EU) 10 New Zealand 00 Nigeria 10 Norway (CTR-21) 10 Oman 00 Pakistan 00 Paraguay 00 Peru 00 Philippines ...

Page 18

... Si2401 Table 10. Country-Specific Register Settings Si2401 Register Country OHS Qatar 00 Reunion 10 Romania 10 Russia 00 Saudi Arabia 00 Singapore 00 Slovakia (EU) 10 Slovenia (EU) 10 South Africa 00 Spain (EU) 10 Sri Lanka 00 Sweden (EU) 10 Switzerland (CTR-21) 10 Syria 00 Taiwan 00 Thailand 00 Tunisia 00 Turkey 10 UAE 00 Ukraine 00 United Kingdom (EU) 10 Uruguay ...

Page 19

... IST register (S82, bits 7:4). If ACL is written to a non-zero value before going off-hook, a parallel phone intrusion that occurs during this IST interval and Rev. 1.0 Si2401 or command mode. 19 ...

Page 20

... SOC[6:5] (CIDM) = 11. Note: CIDM should be disabled before going off-hook. 4.6.6. UK Caller ID Operation The Si2401 starts searching for the Idle State Tone Alert Signal. When this signal has been detected, the Si2401 transmits an “a” to the host. After the Idle State Tone ...

Page 21

... Hz to 390 Hz) and waits to detect a 1300 Hz carrier for 400 ms. If the Si2401 detects more than 1300 Hz carrier in a time window of 400 ms, it sets the S09[7] bit, and the next character echoed by the Si2401 is a “v”. ...

Page 22

... CTS as shown in Figure 4A. If CTS is used to cause a host interrupt, this final interrupt should be ignored by the host. 3. When the Si2401 is ready to send the next byte has not yet received any data from the host, it recognizes this as an end-of-frame, raises CTS, calculates the final CRC code, transmits the code, and begins transmitting stop flags ...

Page 23

... The PLL has a settling time of ~1 ms. Data on RXD should not be sent to the device prior to settling of the PLL. By default, the Si2401 assumes a 4.9152 MHz clock input MHz clock on XTALI is used, a pulldown resistor <10 k Ω must be placed between GPIO4 (Si2401, pin 11) and GND ...

Page 24

... The following section describes the AT command set available in command mode. The Si2401 supports a subset of the typical modem AT command set since it is intended for use with a dedicated microcontroller instead of general terminal applications. AT commands begin with the letters AT and are followed directly (no space) by the command ...

Page 25

... In the above example, the Si2401 dials the first digit “1” using DTMF dialing. The “,” is used to pause in order to ensure that the central office has had time to accept the DTMF digit “ ...

Page 26

... This command does not wait for a carriage return <CR> before taking effect. Note: Two digits must always be entered for both “R” and “N”. SR? Read an S register. This command causes the Si2401 to echo the value of the S-register specified hex format. R must be a hexidecimal number. 26 Note: Two digits must always be entered for R ...

Page 27

... Kissoff Tone Kissoff Tone shorter than or equal to (default = 480 ms) is detected, the Si2401 echoes a “K”. A “k” is echoed if the length of the Kissoff Tone is longer than the S36(KTL) value. The controller can then send the next message. All messages must be preceded by a “ ...

Page 28

... If tonal acknowledgement is not used, the host can toggle the ESCAPE pin to place the Si2401 in the command mode and issue an “ATX2” “ATX3” command to reverse data direction. ...

Page 29

... Automatic Call Progress Detection The Si2401 has the ability to detect dial, busy, and ringback tones automatically. The following is a description of the algorithms implemented for these three tones. Dial Tone . The dial tone detector looks for a dial tone after going off-hook and before dialing is initiated ...

Page 30

... Si2401 Table 16. Si2401 Global Ringer and Busy Tone Cadence Settings Country Australia Austria Belgium Brazil Bulgaria China Cyprus Czech Republic Denmark Finland France Germany Great Britain Greece Hong Kong, New Zealand Hungary Iceland India Ireland Italy, Netherlands, Norway, Thai- land, Switzerland, Israel ...

Page 31

... Care must be 697 1477 exercised when writing to DSP registers. DSP registers can only be written while the Si2401 is on-hook and in 770 1209 the command mode. Writing to any register address not listed in Tables 18 and 19 or writing out-of-range values ...

Page 32

... Si2401 Name DSP Reg. Addr. 0x0002 XMTL DAA modem full-scale transmit level, default = –10 dBm. 0x0003 DTML DTMF high-tone transmit level, default = –5.5 dBm. 0x0004 DTMT DTMF twist ratio (low/high), default = –2 dBm. 0x0005 UFRQ User-defined transmit tone frequency. See register SE5 (SE8=0x02 (Write Only)). ...

Page 33

... A1_k0 0x0011 A1_b1 0x0012 A1_b2 0x0013 A1_a1 0x0014 A1_a2 0x0015 A2_k0 Rev. 1.0 Si2401 SE5 Description DSP register address bits [7:0] DDL DSP register data bits [7: DSP data available 6 = Tone detected 5 = Reserved 4:0 = Tone type 7 = Reserved 6:3 = DTMF tone to transmit 2:0 = Tone type ...

Page 34

... Si2401 0x0016 A2_b1 0x0017 A2_b2 0x0018 A2_a1 0x0019 A2_a2 0x001A B1_k0 0x001B B1_b1 0x001C B1_b2 0x001D B1_a1 0x001E B1_a2 0x001F B2_k0 0x0020 B2_b1 0x0021 B2_b2 0x0022 B2_a1 0x0023 B2_a2 Filter Input Filter CPCD CPSQ Filter A Figure 5. Programmable Call Progress Filter Architecture 34 Table 20 ...

Page 35

... This is a bit-mapped register. Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone detector. Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone detector. Rev. 1.0 Si2401 Reset 0x00 0x02 0x03 0x0E ...

Page 36

... Si2401 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S18 0x18 BTOD S19 0x19 RTON S1A 0x1A RTOF S1B 0x1B RTOD S1C 0x1C DTT S1E 0x1E TATL S1F 0x1F ARM3 S20 0x20 UNL S21 0x21 TSOD S22 0x22 ...

Page 37

... V.22 (1200 bps) modem must detect 1200 bps scrambled ones during a V.22 handshake. Second kissoff tone detector length. The security modes, A1 and !1, echo a “k” kissoff tone longer than the value stored in SKDTL is detected (10 ms units). Rev. 1.0 Si2401 Reset 0x08 , this register sets 0x00 b ...

Page 38

... Si2401 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S37 0x37 CDR S39 0x39 CDT S3A 0x3A ATD S3C 0x3C CIDG S62 0x62 RC S82 0x82 IST SDB 0xDB LVS SDF 0xDF DGSR SE0 0xE0 CF1 SE1 0xE1 GPIO1 ...

Page 39

... This is a bit-mapped register. * This is a bit-mapped register. * This is a bit-mapped register. * This is a bit-mapped register. * This is a bit-mapped register. * This is a bit-mapped register. Rev. 1.0 Si2401 Reset 0x88 0x19 0x16 0x40 0x0C 0x00 0x0F 0x00 0xF0 0x00 — 0x20 ...

Page 40

... Si2401 Table 22. Bit-Mapped Register Summary “S” Register Register Bit 7 Register Address Name (hex) S07 0x07 MF1 S08 0x08 INTM CDM S09 0x09 INTS CD S0C 0x0C MF2 CDE S0D 0x0D MF3 S11 0x11 OFHI S13 0x13 MF4 S15 0x15 MLC ATPRE VCTE ...

Page 41

... SF8 0xF8 DAA8 SF9 0xF9 DAA9 SFC 0xFC DAAFC CTSM Bit 6 Bit 5 Bit 4 Bit 3 OHS[1:0] ILIM MINI[1:0] DCV[1:0] LRV[3:0] BTD Rev. 1.0 Si2401 Bit 2 Bit 1 Bit 0 Default Binary ARL[1:0] ATL[1:0] 0000_1111 RZ RT 0000_0000 ACT[3:0] 1111_0000 DCR OVL ROV 0010_0000 N/A N/A 41 ...

Page 42

... Si2401 S07 (MF1). Modem Functions 1 Bit D7 D6 Name BD Type R/W Reset settings = 0000_0110 (0x06) Bit Name 7 Reserved Read returns zero Blind Dialing Disable Enable (Blind dialing occurs immediately after “ATDT#” command). 5 V23R V.23 Receive.* V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive. ...

Page 43

... A low to high transition in OCD (S09, bit 1) activates INT. 0 REVM V.23 Reversal Detect Mask Change in REV does not affect INT low to high transition in REV (S09, bit 0) activates INT PPDM NVDM RIM R/W R/W R/W Function Rev. 1.0 Si2401 CIDM OCDM REVM R/W R/W R/W 43 ...

Page 44

... Si2401 S09 (INTS). Interrupt Status Bit D7 D6 Name CD WOR Type R/W R/W Reset settings = 0000_0000 (0x00) Bit Name 7 CD Carrier Detect (sticky). Active high bit indicates carrier detected (equivalent to inverse of CD pin). Clears on :1 read. 6 WOR Wake-on-Ring (sticky). Wake-on-ring has occurred. Clears on :I read. ...

Page 45

... CIDM[1:0] Caller ID Monitor Caller ID monitor disabled Caller ID monitor enabled. Si2401 must detect channel seizure signal followed by marks in order to report caller ID data. (Normal Bellcore caller ID Reserved Caller ID monitor enabled. Si2401 must only detect marks in order to report caller ID data. 4 Reserved Read returns zero. 3 9BF Ninth Bit Function ...

Page 46

... Si2401 S0D (MF3). Modem Functions 3 Bit D7 D6 Name RI Type R/W Reset settings = 0000_0000 (0x00) Bit Name 7 Reserved Read returns zero Ring Indicator. Specifies the functionality of pin3 Pin 3 functions as GPIO5 controlled by register SE1 Pin 3 functions as RI. RI asserts during a ring and negates when no ring is present ...

Page 47

... Differential. 3 Reserved Read returns zero. 2 CIDB British Telecom Caller ID Decode Disable Enable. When set, SOC[6:5] is overwritten by the modem, as needed. 1 HDEN HDLC Framing Disable Enable. 0 Reserved Read returns zero Function OFHD R/W R/W Function Rev. 1.0 Si2401 DCL[3:0] R CIDB HDEN R/W R/W 47 ...

Page 48

... Si2401 S15 (MLC). Modem Link Control Bit D7 D6 Name ATPRE VCTE Type R/W R/W Reset settings = 0000_0100 (0x04) Bit Name 7 ATPRE Answer Tone Phase Reversal Disable Enable answer tone phase reversal. 6 VCTE V.25 Calling Tone Disable Enable V.25 calling tone. 5 FHGE 550 Hz Guardtone ...

Page 49

... The Si2400 dynamically sets the On-Hook Analog Receive Gain SF4[6:4] (ARG) to CIDG during a caller ID event (or continuously if S0C[6:5] (CIDM = 11 be set prior to caller ID operation. 000 = 0 dB 001 = 3 dB 010 = 6 dB 011 = 9 dB 100 = Function Rev. 1.0 Si2401 CIDG[2:0] R/W ). This field should b 49 ...

Page 50

... Si2401 S62 (RC). Result Codes Override Bit D7 D6 Name OCR Type R/W Reset settings = 0100_0001 (0x41) Bit Name 7 Reserved Read returns zero. 6 OCR Overcurrent Result Code (“x”). 0 = Enable Disable. 5:3 Reserved Read returns zero Intrusion Result Code (“I” and “i”). ...

Page 51

... Intrusion disabled from start of dial to register S29 time out Intrusion disabled from start of dial to carrier detect or to “N” or “n” result code. 0 Reserved Read returns zero LCLD R/W Function ® chipset goes off-hook and the off-hook intrusion Rev. 1.0 Si2401 IB[1:0] R/W 51 ...

Page 52

... Si2401 SDF (DGSR). Intrusion Deglitch Bit D7 D6 Name Type Reset settings = 0000_1100 (0x0C) Bit Name 7 Reserved Read returns zero. 6:0 DGSR[6:0] Deglitch Sample Rate. Sets the sample rate for the deglitch algorithm and the off-hook intrusion algorithm (40 ms units). 0000000 = Disables the deglitch algorithm, and sets the off-hook intrusion sample rate to 200 ms and delay between compared samples to 800 ms ...

Page 53

... Digital output (relay drive; also used for CD function Reserved Digital input. 1:0 GPIO1[1:0] GPIO1 Digital input Digital output (relay drive Reserved Reserved. *Note used as a GPIO pin; SE4[3] (GPE) must equal zero Function GPIO3[1:0] GPIO2[1:0] R/W R/W Function Rev. 1.0 Si2401 GPD5 GPIO5 R/W R GPIO1[1:0] R/W 53 ...

Page 54

... Si2401 SE3 (GPD). GPIO Data Bit D7 D6 Name Type Reset settings N/A Bit Name 7:4 Reserved Read returns zero. 3 GPD4 GPIO4 Data. Data = 0 Data = 1 2 GPD3 GPIO3 Data. Data = 0 Data = 1 1 GPD2 GPIO2 Data. Data = 0 Data = 1 0 GPD1 GPIO1 Data. Data = 0 Data = 1 SE4 (CF5) ...

Page 55

... V.23 forward channel mark 1300 Hz (V23E = 1) V.23 backward channel mark 390 Hz (V23E = 1) User defined frequency 1 (USEN1 = 1) User defined frequency 2 (USEN1 = 1) Call progress filter A detected User defined frequency 3 (USEN2 = 1) User defined frequency 4 (USEN2 = 1) Call progress filter B detected Rev. 1.0 Si2401 TONE[4:0] R Priority 1 2 ...

Page 56

... Si2401 SE5 (DSP2). (SE8 = 0x02) Write Only Definition Bit D7 D6 Name Type Reset settings N/A Bit Name 7 Reserved Always write zero. 6:3 DTM[3:0] Tone Type Generated. DTMF tone (0–15) to transmit when selected by TONC = 001. See Table 17 on page 31. 2:0 TONC[2:0] DTMF Tone Selector. ...

Page 57

... Enable the reporting of V.23 tones, 390 Hz and 1300 Hz. 1 ANSE Answering Tone Reporting Enable Disable Enable the reporting of answer tones. 0 DTMFE DTMF Tone Reporting Enable Disable Enable the reporting of DTMF tones USEN2 USEN1 W W Function Rev. 1.0 Si2401 V23E ANSE DTMFE ...

Page 58

... Si2401 SEB (TPD). Timer and Powerdown Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read returns zero. 3 PDDE Powerdown DSP Engine Power on Powerdown. 2:0 Reserved Read returns zero PDDE R/W Function Rev. 1 ...

Page 59

... Reserved This bit must always be written to zero RDLY[2:0] R/W Function Delay 0 ms 256 ms 512 ms 1792 ms Ring Confirmation Count Time 100 s m 150 s m 200 s m 256 s m 384 s m 512 s m 640 s m 1024 s m Rev. 1.0 Si2401 RCC[2:0] R/W 59 ...

Page 60

... Si2401 SED (RVC2). Ring Validation Control 2 Bit D7 D6 Name Type Reset settings = 0001_1001 (0x19) Bit Name 7:6 Reserved Read returns zero. 5:0 RAS[5:0] Ring Assertion Time. These bits set the minimum ring frequency for a valid ring signal. During ring qualification, a timer is loaded with the RAS[5:0] field upon a TIP/RING event and decrements at a reg- ular rate ...

Page 61

... At 20 Hz, TIP/RING events would occur every 1/( Hz ms. To calculate the cor- rect RMX[3:0] value for a frequency range [f_min, f_max], the following equation should be used: RMX[3: RAS[5:0] – – (1/(2 x f_max)). R/W Function Ring Timeout 128 s m 256 s m 1920 s m Rev. 1.0 Si2401 RMX[3:0] R/W 61 ...

Page 62

... Reserved Read returns zero. 1:0 LM[1:0] Line Mode. These bits determine the line status of the Si2401 On-hook 01 = Off-hook 10 = On-hook line monitor mode 11 = Reserved *Note: Under normal operation, the Si2401 internal microcontroller automatically sets these bits appropriately Function Rev. 1 LM[1:0] R/W ...

Page 63

... When the line-side device detects a billing tone, SF9[3] (BTD) is set Disable Enable. 6 PDN Powerdown Normal operation Powers down the Si2401. 5 PDL Powerdown Line-Side Chip (typically only used for board level debug Normal operation. Program the clock generator before clearing this bit Places the line-side device in lower power mode. 4 LVFD Line Voltage Force Disable ...

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... Si2401 SF2 (DAA2). DAA Low Level Functions 2 Bit D7 D6 Name Type Reset settings = xxxx_1xxx Bit Name 7:4 Reserved Read only. 3 FDT Frame Detect (Typically only used for board-level debug Indicates isolation capacitor frame lock has been established Indicates isolation capacitor frame lock has not been established. ...

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... Signals above the upper level are guaranteed to generated a ring detection 13 19.35 to 23. OHS[1:0] ILIM R/W R/W Function Mean On-Hook Speed Less than 0 ±10% (Meets ETSI standard ±10% (Meets Australian spark quenching spec) RMS RMS Rev. 1.0 Si2401 R/W R/W 65 ...

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... Si2401 SF6 (DAA6). DAA Low Level Functions 6 Bit D7 D6 Name MINI[1:0] Type R/W Reset settings = 1111_0000 (0xF0) Bit Name 7:6 MINI[1:0] Minimum Operational Loop Current. Adjusts the minimum loop current at which the DAA can operate. Increasing the mini- mum operational loop current can improve signal headroom at a lower TIP/RING volt- age ...

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... Billing Tone Detect (sticky billing tone detected Billing tone detected. 2 OVL Receive overload. Same as ROV, except not sticky. 1 ROV Receive Overload (sticky excessive level detected Excessive input level detected. 0 Reserved Do not modify Function BTD R/W Function Rev. 1.0 Si2401 DCR R OVL ROV R R/W 67 ...

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... Si2401 SFC (DAAFC). DAA Low Level Functions Bit D7 D6 Name CTSM Type R/W Reset settings N/A Bit Name 7 CTSM Clear-to-Send (CTS) Mode CTS pin is negated as soon as a start bit is detected and reasserted when the transmit FIFO is empty CTS pin is negated when the FIFO is > 70% full and reasserted when the FIFO is < ...

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... Transmit Data. Serial communication data to the Si2401. 7 CTS Clear to Send. Clear to send output used by the Si2401 to signal that the device is ready to receive more digital data on the TXD pin. 8 RESET Reset Input. An active low input that is used to reset all control registers to a defined, initialized state ...

Page 70

... Si2401 Pin # Pin Name 11 GPIO4/INT/ General Purpose Input/INT. AOUT This pin can be either a GPIO pin (digital in, digital out) or the INT pin. Default is digital in. When programmed as INT, this pin provides five functions. While the modem is connected, it asserts if the carrier is lost, a wake-on ring (using the “ATZ” command) event is detected, a loss of loop current event is detected, V ...

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... Serves as the receive side input from the telephone network Internal Bias 1. Provides Internal Bias. 5 C1B Isolation Capacitor 1B. Connects to one side of isolation capacitor C1 and communicates with the Si2401. 6 C2B Isolation Capacitor 2B. Connects to one side of isolation capacitor C2 and communicates with the Si2401. 7 VREG Voltage Regulator. ...

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... Si2401 10. Ordering Guide Chipset Region Si2401 Global 72 Digital Line Si2401-FS Si3010-F-FS Rev. 1.0 Lead-Free Temperature Yes °C ...

Page 73

... Package Outline: 16-Pin SOIC Figure 6 illustrates the package details for the Si2401 and Si3010. Table 24 lists the values for the dimensions shown in the illustration aaa - Seating Plane Figure 6. 16-pin Small Outline Integrated Circuit (SOIC) Package Table 24. Package Diagram Dimensions bbb -B- θ ...

Page 74

... Updated ring detect voltage values in Table 2 on page 5. Updated transmit and receive values in Table 4 on page 7. Updated "3. Bill of Materials: Si2401/10 Chipset" on page 11. Updated country-specific register settings in Table 10 on page 15. Updated reset values in Table 21 on page 35. Updated default binary values in Table 22 on page 40. Updated " ...

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... N : OTES Rev. 1.0 Si2401 75 ...

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... Si2401 C I ONTACT NFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: productinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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