Z0220112VSGR4078 Zilog, Z0220112VSGR4078 Datasheet
Z0220112VSGR4078
Specifications of Z0220112VSGR4078
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Z0220112VSGR4078 Summary of contents
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... Z02201 V.22BIS D I NTEGRATED Product Specification PS000904-0107 Copyright © 2007 by ZiLOG, Inc. All rights reserved. www.zilog.com P ATA UMP WITH AFE ...
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... HEREIN OR OTHERWISE. Devices sold by ZiLOG, Inc. are covered by warranty and limitation of liability provisions appearing in the ZiLOG, Inc. Terms and Conditions of Sale. ZiLOG, Inc. makes no warranty of merchantability or fitness for any purpose. Except with the express written approval of ZiLOG, use of information, devices, or technology as critical components of life support systems is not authorized ...
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Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Call-Progress Monitoring Using Biquad Tone Detectors . . . . . . . . . . . . . . . . . . 54 Simultaneous Transmission and Detection of Tones . . . . . . . . . ...
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Features Device Z02201 • Combined data pump and Analog Front-End (AFE) • Full duplex data modem throughput to 2400 bps ITU V.22bis, V.23, V.22, V.21 – Bell 212A and Bell 103 – • FSK (V.23 1200/75 bps, V.21/Bell 103 300 ...
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General Description The Z02201 is a synchronous single-chip modem solution that provides a means to construct a V.22bis modem capable of 2400 bps full duplex over dial-up lines. The Z02201 is specifically designed for use in embedded modem applications where ...
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All signals with an overline, are active Low. For example, B/W, Note: in which WORD is active Low; or Low. Power connections follow conventional descriptions below: Connection Power Ground PS000904-0107 V.22BIS Data Pump with Integrated AFE /W, in which BYTE ...
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RESET HD7–HD0 HA2–HA0 HCS Parallel HWR Interface HRD HIRQ TXD RXD Serial RTS Interface RLSD TCLK RCLK PS000904-0107 V.22BIS Data Pump with Integrated AFE A/D Converter D/A Converter Digital Oscillator Signal Processor Eye Pattern Interface 8K ROM Figure 1. Z02201 ...
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... User Information The ZiLOG Z02201 data pump can be selected for either parallel or serial synchronous data transfer under software control. diagram of the general modem chip interface. The hardware and software configurations can be customized for a particular modem application. The parallel interface allows direct access to 7 I/O registers, indirect access to the modem RAM, and is compatible with the Z8, Z80, Z18X family, and other 8-bit microprocessors ...
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AV DD TX0+ TX0– A GND Vref A GND CF1 CF2 RXI– RXI+ AVDD Figure 3. Z02201 44-Lead PLCC Pin Identification AVdd TXO+ TXO- Agnd Vref Agnd CF1 CF2 RXI- RXI+ AVdd Figure 4. Z02201 44-Lead LQFP Pin Identification PS000904-0107 ...
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Pin Description Table 1. Z02201 Pin Assignments PLCC Pin LQFP Pin ...
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Table 1. Z02201 Pin Assignments (Continued) PLCC Pin LQFP Pin ...
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V . The HIRQ active Low data pump output can be activated when the DD host selects this option or requests by setting the RXIE or TXIE bits in the data pump Host Register. This pin can be connected ...
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EYESTB Serial Eye Pattern Strobe (Output, Active High)— loading an external D/A converter. TXO+ Transmit Differential Analog Output Positive (Analog Output)— TXO– is capable of driving a 600-ohm resistive load over a leased line or public switched telephone network via ...
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Absolute Maximum Ratings Table 2. Absolute Maximum Ratings Symbol Description V Supply Voltage CC T Operating Temperature 0 OPR (com) T Storage Temperature STG Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. ...
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Environmental and power requirements The modem power and environmental requirements are indicated in the crystal specifications. Table 3. Power Requirements Voltage + Operating + Sleep DC Note: All voltages are ±5% DC and must have ...
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Table 5. Z02201 Crystal Specifications (Continued) Parameter Load Capacitance Drive Level Aging, per Year Max. Oscillation Mode Series Resistance Max. Frequency Variation with 28.8 or 35.2 pF load PS000904-0107 V.22BIS Data Pump with Integrated AFE Value 32 ± 0.3 pF ...
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DC Characteristics Table 6. TDC Pin Characteristics Parameter Description Pin Types I and I/O: Input and Input-Output V Input High Voltage IH V Input Low Voltage IL I Input Leakage Current L Pin Types O and IO: Output and Input-Output ...
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Table 6. TDC Pin Characteristics (Continued) Parameter Description V Analog Output Voltage O V Output DC Offset OFF R Output Resistance O C Output Capacitance O Z Load Impedance I Pin Type PWR: Power and Ground V Digital Supply Voltage ...
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AC Characteristics Timing Diagrams RS0–2 Valid Address RD 3 D0–D7 WR Figure 5. Microprocessor Interface Read/Write Diagram Table 7. Microprocessor Interface Timing Description Read Timing HA0–2 and HCS to HRD Setup Time HA0–2 to HRD Setup Time ...
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Table 7. Microprocessor Interface Timing (Continued) Description HWR Pulse Width Reset Timing Reset Pulse Width Reset Rise Time DCLK TXD 1 RXD Table 8. Serial Interface Timing Description RXD Data Valid Delay Time TXD Data Setup Time TXD Data Hold ...
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Timing Diagrams EYECLK EYESTB EYEOUT D15 (MSB EYEX) Table 9. Analog Characteristics Table Description Input impedance of transformer interface 3 dB point of interface External integration capacitance Type NPO (COG) Analog Inputs: Type AI Table 10. Analog Inputs, Type AI ...
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Characteristics Input Capacitance Input Bias Analog Input Voltage (Peak Differential), (23) Analog Input Voltage (Per RXI+. RXI- Pin) Analog Outputs: Type A0 Table 11. Analog Inputs Type A0 AC Characteristics Power Supply Rejection Signal ...
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Hardware Interface Signals The Z02201 interface consists of the Synchronous Serial Interface Port, 8-bit Host Microprocessor Interface, Eye Pattern Interface, Voice Band AFE, System Sig- nals, and Overhead Signals. The Z02201 functional interconnect diagram is indi- cated in Figure signal ...
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Table 12. Synchronous Serial Interface Port Pin TxD RxD RTS RLSD TCLK RCLK Host Port Interface The host parallel port interface consists of 15 signal pins: 8-bit bidirectional data bus pins (HD7–HD0), 3-bit Address bus (HA2–HA0), four control lines, which ...
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X-axis data first. EYEOUT is synchronous with the rising edge of EYECLK. EYE- OUT is valid only while the EYESTB is Low. Data is shifted out MSB first. Data on eyeout is shifted out on each rising edge of the ...
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Table 13. Selectable Configurations (Continued) V.21 FSK Bell 212A DPSK Bell 103 FSK Notes: 1. Configuration is selected through the RAM location Config. 2. QAM=Quadrature Amplitude Modulation FSK=Frequency Shift Keying, DPSK=Dual Phase Shift Keying Transmitted Data Spectrum The transmitted data ...
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Clamping Received Data (RXD) is clamped to a constant mark whenever RLSD is OFF. Carrier Recovery The recovery circuit can track a ±7 Hz frequency offset in the receiver carrier with less than 1.0 dB degradation in performance. Software Interface ...
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Microprocessor Interface Register and Bit Definitions: Reg0, Reg1 RAMDL, RAMDH—DATA PUMP RAM DATA REGISTERS— RAMDL is the least significant byte, and RAMDH is the most significant byte. After a data pump RAM read operation has completed, these registers contain the ...
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Table 16. REG4: RAM Control Register (Continued) SYMBOL POSITION NAME AND DESCRIPTION RAMlE REG 4, bit 5 RAM Interrupt Enable Bit. Setting this bit allows the data pump to interrupt the host when a RAM read/write request has been completed. ...
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Bit TXI RXI RAMI Table 17. REG5: Data Pump Status Register SYMBOL POSITION NAME AND DESCRIPTION RES REG 5, bit 0 Data Pump in RESET Mode. This bit is set whenever the data pump is in RESET mode ...
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Bit Table 18. REG7: HDLC Register SYMBOL POSITION NAME AND DESCRIPTION EOF REG 7, bit 0 Receive End of Frame. The data pump sets EOF to 1 when an HDLC frame has been completely received (that ...
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Bits not defined above are reserved or not available for use. The host reads register Reg7 immediately before DATAP. The two CRC checksum bytes in received HDLC frames are provided ...
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RAMIE RAMI RXIE RXI TXIE TXI Figure 9. Host Interrupt Circuit Diagram Interface RAM The interface RAM is used by the data pump for normal operations. All writes to the interface RAM should be Read-Modify-Write, where only the bits that ...
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Write the lower 8 bits of the address of the data pump RAM location to register RAMAL. 3. With one write operation to register R4, set the high bit of the data pump RAM address in R4, RAMAH, set ...
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Modem Data Pump RAM Map Table 19. Modem Data Pump RAM Map Mnemonic Address (Hex) Config 01FF Trnctrl 01FE Bufctrl 01FD ToneStatus 01FC Dpctrl 01FA MStatus 01F7 EQMMaxThresh 01F6 RLSDOffThresh 01F5 RLSDOnThresh 01F4 CONN_Mode 01F0 Notch 01A2–01A6 DTMFh_lev 01A1 DTMFl_lev ...
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Table 19. Modem Data Pump RAM Map (Continued) Mnemonic Address (Hex) DTD0Lev–DTD15Lev 026–035 DTDThresh 03 DTDStatus 00 PS000904-0107 V.22BIS Data Pump with Integrated AFE Access Mode Description R/W Tone Detector Levels R/W Tone Detector Threshold R/W Discrete Tone Detector Status ...
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Interface RAM Definitions Table 20. Modem Data Pump Word Definitions Register & Address Default (hex) Value Config 01FF 0H b15 b14 b13 b12 b11 b10 PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Data pump ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value b0–6 PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation MODE (Data Mode Configuration: selects a mode) Selects the data pump operation mode. All modes ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value Trnctrl 01FE 0H PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Training Control Register The data pump sets this location to its default value ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation b7 SB1DET–Scrambled Binary 1 Detected (1200 bps or 2400 bps). Debounced through 30 ms. b6 S1DET–S1 ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value Bufctrl 01FD 0h PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Buffer Control Register 38 ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation b15.. Set these bits to 0 when setting Bufctrl.HDLC HDLC (Set HDLC ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value ToneStatus 01FC 080h PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Biquad Tone Detector Control and Status, Dial Control The data pump sets this ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation b15 TONEA (Tone A Detected) The tone frequency programmed in biquad detector A is detected if ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value Dpctrl 01FA 0H PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Data Pump Miscellaneous Controls Do not modify this location during automatic handshake or ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value MStatus 01F 0H EQM MaxThresh 01F6 400H RLSDOffThresh 01F5 –48 dBm Received Line Signal Detect OFF Threshold RLSDOnThresh 01F4 –43 dBm Received Line Signal Detect ON ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation This register represents the upper and lower thresholds of the received telephone line energy. If Reg5, ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value CONN_Mode 01F0 — PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Connection Mode Register This RAM location reports the connection type and speed established ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value Notch 01A2-1A6 below PS000904-0107 V.22BIS Data Pump with Integrated AFE Function and Explanation Notch Filter Coefficients These RAM locations contain the notch filter coefficients. The notch ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value DTMFh_lev 01A1 –6 dBm DTMFl_lev 01A0 –9 dBm ToneGenA 0191 — ToneGenB 0196 — TxLevel 0185 –10 dBm Transmit Power Level Seq3Count 18E None Seq2Count 18D ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value Seq1Count 18C 95 msec Biquad A Coefficients — 0155–015E Biquad B Coefficients — 015F–0168 DTD0–DTD15 — 0145–0154 EQMlev 092 — PS000904-0107 V.22BIS Data Pump with Integrated ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value BiQuadOffThresh 052 –42 dBm Biquad Tone Detectors OFF Point BiQuadOnThresh 051 –35 dBm Biquad Tone Detectors ON Point DTD0Lev– 26–35 — DTD15Lev DTDThresh 03 –24 dBm ...
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Table 20. Modem Data Pump Word Definitions (Continued) Register & Address Default (hex) Value DTDStatus 00 — Transmitting Tones The data pump has two tone generators, each with their own transmit level. The outputs are mixed together. The frequency of ...
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High Band Tone (0x196) DTMFh_lev (0x1A1) For example, to generate a 2100 Hz Answer Tone for 3.3 seconds at –10dBm: 1. Set location TONEGENA to 2. Set location DTMFL_LEV to 3. Set location DTMFH_LEV to 4. Set CONFIG register, bits ...
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Tone Detector Status– • The tone coefficients are calculated as follows: • The default values on reset are represented in Table 21. Tone Detector Default Values Tone Detector ...
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To use the tone detectors, perform the following steps: 1. Set up the tone detector coefficients ( 2. Set CONFIG register, bits 0–6 (MODE) to tone detect mode ( Tone detect mode is the same mode used for Biquad tone ...
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Call-Progress Monitoring Using Biquad Tone Detectors The data pump contains two biquad tone detectors that are capable of detecting energy in a frequency band. These detectors are useful for call-progress monitoring, where the exact frequency of the incoming signal is ...
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Table 22. Biquad Section 1 Coefficients (Hex) Band (Hz 245–650 C774 7601 0716 360–440 C148 7A66 FF5C Table 23. Biquad Section 2 Coefficients (Hex) Band (Hz 245–650 C63E 6FE1 F8EA 360–440 C7CD 7438 01AA ...
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Simultaneous Transmission and Detection of Tones Setting CONFIG register, bits 0–6 (MODE all Discrete Tone Detectors, Biquad Tone Detectors, and Tone Generators. Please refer to the sections on page 51 for descriptions of how to use each of ...
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Failing to program the notch filter to the same frequency as Notes: the transmitted tone when CONFIG register, bits 0–6 (MODE) is seriously reduces the accuracy and sensitivity of the data 4 pump's tone detectors not possible to ...
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Set up the digit to be dialed in TONESTATUS bits following table: Table 25. Tone Dialing Digit For continuous operation, set Reg4, ...
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DTMFh_lev and DTMFl_lev exceeds 30720 (0x7800) the data pump may not properly transmit the tones. When transmitting DTMF with a required twist (power difference between high and low bands), use this formula to determine the maximum DTMF transmit levels ...
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The host begins a manual handshake by setting CONFIG register, bit TRL prevent the data pump from transmitting its own handshake signals. 1 The host monitors the receive signal status bits in location TRNCTRL and trans- mits its ...
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Wait for TRNCTRL, bit continuously for 155 msec. 5. Wait for 456 msec. 6. Set TRNCTRL, bits 7. Set TRNCTRL, bits bit (S1DET) and TRNCTRL, bit 6 signal or SB1. If SB1 is received for 270 msec, proceed to ...
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Set TRNCTRL, bit 150 msec. 10. Set TRNCTRL, bits msec. 11. Set TRNCTRL, bits being transmitted and received at 2400 bps. 12 step 6., SB1 is received instead signal, set TRNCTRL, bits (TXCTRL) to ...
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Set CONFIG to 8 (V.22BIS ANSWER). After setting Config, the host should be prepared to receive data from the remote modem. The data pump holds the received data to marks (receives nothing) until the modem is able to receive ...
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A flag, byte value abort, which is any sequence of consecutive binary 1s more than six bits long. If the frames do not use the bandwidth of the data mode (for example, when there is no host data to transmit), ...
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Reg4, bit pump is ready to transmit another data byte. To transmit another frame, repeat steps 1–2. 3. When the data pump begins sending the frame's closing flag, it sets ...
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Read the DATAP register. This register returns the code release version number (an 8 bit value, for example, 3. Read RAM location 0. This location returns the part number (for example, for a Z02201 part). 02201h Sleep Mode The ...
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Modems usually exhibit lower bit error rates receiving in the low Note: band as opposed to the high band. When an analog link is completed, the Adaptive Equalizer (AEQ) is frozen. The noise level is increased without making new links. ...
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Data Pump, Version 41 Line Type: Flat Receive Level (line): -30 dBm 1.E-02 1.E-03 1.E-04 1.E- S rsio n 41 Line Ty pe: F lat Rec eive ...
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Figure 14. Typical Modem Using Z02201 and a Z02205 Controller PS000904-0107 V.22BIS Data Pump with Integrated AFE ...
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Example DAA Figure 15 indicates an example DAA configuration for North America. Isolation transformer, T1, couples the primary (line) and secondary (modem) sides, while providing high voltage isolation. This wet transformer (allowing DC current) simplifies the circuit, while reducing the ...
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PS000904-0107 V.22BIS Data Pump with Integrated AFE Figure 15. Example DAA ...
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... Eye Pattern Circuit Figure 16 is the eye pattern circuitry used in the Z0220100ZCO modem evaluation board, and can be used with modem components such as the ZiLOG Z02201 and Z02201 that have an eye pattern interface. The Z02201 Eye Pattern port consists of 3 signals: Data (EYEOUT)— ...
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Package Information PS000904-0107 V.22BIS Data Pump with Integrated AFE Figure 17. 44-Lead PLCC Package Diagram 73 ...
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Figure 18. 44-Pin LQFP Package Diagram PS000904-0107 V.22BIS Data Pump with Integrated AFE DETAIL 0-7˚ 74 ...
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... Refer to the Z02201 Product Update for the software differences between the two ROM codes versions. The Product Update also lists the work-arounds for Ver. 0x31 of the ROM Code. For fast results, contact your local ZiLOG sales office for assistance in ordering the part required.Codes Speed 12=12 ...