SI3008-B-FS Silicon Laboratories Inc, SI3008-B-FS Datasheet
SI3008-B-FS
Specifications of SI3008-B-FS
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SI3008-B-FS Summary of contents
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... See page 66. Pin Assignments Si2401 1 16 GPIO1/EOFR CLKIN/XTALI XTALO 2 15 GPIO2/ GPIO3/ESC GPIO5/ GND RXD TXD 6 11 GPIO4/INT/AOUT CTS 7 10 C1A 8 RESET 9 C2A Si3008 C1B C2B 2 7 DCT IGND VREG CID 4 5 U.S. Patent #5,870,046 U.S. Patent #6,061,009 Other patents pending Si2401-Si3008 ...
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... Si2401/Si3008 2 Rev. 1.1 ...
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... Modem Result Codes and Call Progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6. Low Level DSP Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 6.1. DSP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.2. Call Progress Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8. Pin Descriptions: Si2401 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 9. Pin Descriptions: Si3008 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 10. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 11. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 12. Package Outline: 8-Pin Exposed Pad SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 Si2401/Si3008 Rev ...
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... The Si2401 specifications are guaranteed when the typical application circuit (including component tolerance) and Si2401 and Si3008 are used. See "2. Typical Application Schematic" on page 9. 2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 ° ...
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... pin SEB[ ATZ D I SF1[5] =1, D SF1[ 600 Ω μF – Rev. 1.1 Si2401/Si3008 Min Typ Max Unit 2.0 — — V — — 0.8 V 2.4 — — V — — 0.35 V — — 0.6 V –10 — 10 µA 50 100 200 kΩ — — ...
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... Si2401/Si3008 Table 4. AC Characteristics (V = 3 °C for K-Grade kHz Parameter Sample Rate Clock Input Frequency Clock Input Frequency Receive Frequency Response 1 Transmit Full Scale Level 1,2 Receive Full Scale Level 3,4,5 Dynamic Range 3,4,5 Dynamic Range Transmit Total Harmonic 5,6 ...
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... Storage Temperature Range Note: Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Si2401/Si3008 Symbol Value V 4 ...
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... Si2401/Si3008 Table 6. Switching Characteristics for F-Grade (V = 3 ° Parameter Baud Rate Accuracy CTS ↓ Active to Start Bit↓ RESET Pulse Width RESET ↑ to TXD ↓ Note: All timing is referenced to the 50% level of the waveform. Input test levels are V RXD 8-Bit Data ...
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... Typical Application Schematic epad IGND GND Rev. 1.1 Si2401/Si3008 9 ...
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... MΩ, 1/16 W, ±5% 1 kΩ, 1/16 W, ±5% 56 Ω, 1/16 W, ±1% 0 Ω, 1/16 W 1.5 MΩ, 1/16 W, ±5% 180 kΩ, 1/16 W, ±5% 3 MΩ, 1/16 W, ±5% Si2401 Si3008 Dual Zener Diode 1/4 W Rev. 1.1 Supplier(s) Panasonic, Murata, Vishay Venkel, SMEC Venkel, SMEC Venkel, SMEC ...
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... The Si2401 solution integrates a silicon DAA using Silicon Laboratories’ proprietary fourth-generation DAA technology. integrated DAA can be programmed using the Si3008 to meet international requirements and is compliant with FCC, JATE, and other country-specific specifications as shown in Table 7 ...
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... Si2401/Si3008 Configuration V.21 * V.22 * V.22bis V.23 V.23 Bell 103 Bell 212A Security SIA—Pulse SIA Format *Note: The Si2401 only adjusts its DCE rate from 2400 bps to 1200 bps connecting to a V.22-only (1200 bps only) modem. Since the V.22bis specification does not outline a fallback procedure, the host should implement a fallback mechanism consisting of hanging up and connecting at a lower baud rate ...
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... Data from the host for transmission to the remote modem is shifted to the Si2401 on TXD beginning with a start bit, LSB first at the DTE rate determined by the SE0[2:0] setting and terminates with a stop bit. Rev. 1.1 Si2401/Si3008 ® asynchronous ...
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... Si2401/Si3008 After the middle of the stop bit time, the Si2401 begins looking for a logic 1 to logic 0 transition signaling the start of the next character on TXD to be sent to the line (remote modem). 4.2.3. 9-Bit Data Mode (9N1) The 9-bit data mode is set by SE0[3] (ND ...
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... DAA operation, S09[4] (NLD) is set. During this event, if the NLR result code is enabled by setting S62[1](NLR the “l” result code is sent. Once the loop current returns to a normal current state, the “L” Rev. 1.1 Si2401/Si3008 ( loss-of-phone-line voltage/ ...
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... Si2401/Si3008 result code is sent. The INT pin is also asserted if enabled. 4.5.2. Loss-of-Carrier Detection The Si2401 has two methods of implementing a loss-of- carrier function. If GPIO4 is programmed as INT and if S08[7](CDM INT asserts in data mode when a loss-of-carrier is detected. The carrier detect function may also be implemented on GPIO2 by setting SE2[3:2] (GPIO2 and SOC[7](CDE ...
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... S15[0] (NBE) = 1), the ninth bit is raised if the byte is a frame result word. To program this mode, set S0C[3] (9BF and SE0[3] (ND When the next frame of data is detected, EOFR is lowered, and the process repeats at Step 1. Rev. 1.1 Si2401/Si3008 17 ...
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... Si2401/Si3008 To summarize, when receiving HDLC frames, the host begins receiving data asynchronously from the Si2401. When each byte is received, the host should check the EOFR pin (or the ninth bit). If the EOFR pin (or the ninth bit) is low, the data is valid frame data. If the EOFR pin (or the ninth bit) is high, the data is a frame result word ...
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... TASL Answer Tone Length (only used in S1E [TATL] = 0x00) S35 RSOL Receive V.22 Scrambled Ones Length Function Units 1 s 5/3 ms 5/3 ms 53.3 ms 5/3 ms 5/3 ms (256) 5/3 ms 5/3 ms 5/3 ms Rev. 1.1 Si2401/Si3008 Default Fast Connect 0x03 00 0x2D 00 0x5D 00 0x09 00 0xA2 00 0xCB 00 0x08 00 ...
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... Si2401/Si3008 5. AT Command Set The controller provides several vital functions including AT command parsing, DAA control, connect sequence control, DCE protocol control, intrusion detection, parallel phone off-hook detection, escape control, caller ID control and formatting, ring detect, DTMF control, call progress monitoring, and HDLC framing. The controller also writes to the control registers that configure the modem ...
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... If any character is received by the Si2401 between the ATDT#<CR> (or ATDP#<CR>) command and when the connection is made (“c” or “d” is echoed), the extra Si2401/Si3008 character is interpreted as an abort, and the Si2401 returns to command mode ready to accept AT commands. A line feed character immediately following the < ...
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... Si2401/Si3008 H1 Off-hook Go off-hook. I Chip Identification This command causes the modem to echo the chip revision for the Si2401 device Revision Revision Revision C, etc. I6 ® Display the ISOmodem model number. “2401” = Si2401. :I Interrupt Read This command causes the ISOmodem chipset to report the contents of the interrupt status register (S09). The WOR, PPD, NLD, RI, OCD, and REV bits are also cleared, and the INT is deactivated on this read ...
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... Wakeup on Ring (lower-case z) The Si2401 enters a low-power mode in which the DSP and microcontroller are powered down. In this mode, only the line-side device (Si3008) and the isolation capacitor communication link are functional. An incoming ring signal or line transient causes the Si2401 to power up and echo an “R”. Any character received on the RXD pin also causes the Si2401 to exit the wakeup- on-ring state ...
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... Si2401/Si3008 the block is transmitted, the modem can monitor for the acknowledge tone by completing sequence: 1. Place the Si2401 in the command mode by pulsing the ESCAPE pin (Si2401 pin 14). The “+++” and “ninth-bit” escape modes operate in the “!2” mode but are not recommended because they can send unwanted characters to the remote modem. 2. Issue the “ ...
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... The user can then put the DSP into call progress monitoring by first setting SE8 = 0x02. Next, set SE5 (DSP2) = 0x00 so no tones are transmitted, and set SE6 (DSP3) to the appropriate code, depending on which types of tones are to be detected. Units 53.333 ms Rev. 1.1 Si2401/Si3008 25 ...
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... Si2401/Si3008 Table 16. Si2401 Global Ringer and Busy Tone Cadence Settings Country China Hong Kong Hungary India Japan, Korea Malaysia Mexico Singapore Taiwan U.S., Canada (default) At this point, users may program their own algorithm to monitor the detected tones. If the host wishes to dial, it ...
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... SE5=15 sets the low bits. SE8=01 sets up registers SE5 and SE6 as DSP data registers for the previously-written DSP address (0x15). SE6=01 sets the six high bits of the 14-bit data word, and SE5=35 sets the eight low bits of the 14-bit data word. Si2401/Si3008 Rev. 1.1 27 ...
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... Si2401/Si3008 Name DSP Reg. Addr. 0x0002 XMTL DAA modem full-scale transmit level, default = –10 dBm. 0x0003 DTML DTMF high-tone transmit level, default = –5.5 dBm. 0x0004 DTMT DTMF twist ratio (low/high), default = –2 dBm. 0x0005 UFRQ User-defined transmit tone frequency. See register SE5 (SE8=0x02 (Write Only)). ...
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... Rev. 1.1 Si2401/Si3008 SE5 Description DSP register address bits [7:0] DDL DSP register data bits [7: DSP data available 6 = Tone detected 5 = Reserved 4:0 = Tone type 7 = Reserved 6:3 = DTMF tone to transmit 2:0 = Tone type ...
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... Si2401/Si3008 Filter Input Filter CPCD CPSQ Filter A Figure 5. Programmable Call Progress Filter Architecture 30 CPCD 1 Energy 0 Detect B Max (A,B) A Energy Detect 20log Rev. 1.1 A Hysteresis TDET A > (4096/CPDL) –43 dBm 10 ...
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... This is a bit-mapped register. Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone detector. Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone detector. Rev. 1.1 Si2401/Si3008 Reset 0x00 0x02 0x03 0x0E ...
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... Si2401/Si3008 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S18 0x18 BTOD S19 0x19 RTON S1A 0x1A RTOF S1B 0x1B RTOD S1C 0x1C DTT S1E 0x1E TATL S1F 0x1F ARM3 S20 0x20 UNL S21 0x21 TSOD S22 0x22 ...
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... V.22 (1200 bps) modem must detect 1200 bps scrambled ones during a V.22 handshake. Second kissoff tone detector length. The security modes, A1 and !1, echo a “k” kissoff tone longer than the value stored in SKDTL is detected (10 ms units). Rev. 1.1 Si2401/Si3008 Reset 0x08 , this register sets 0x00 b ...
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... Si2401/Si3008 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S37 0x37 CDR S39 0x39 CDT S3A 0x3A ATD S3B 0x3B RP S3C 0x3C CIDG S62 0x62 RC S82 0x82 IST SDB 0xDB LVS SDF 0xDF DGSR SE0 0xE0 CF1 SE1 ...
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... This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. Rev. 1.1 Si2401/Si3008 Reset 0x00 0x88 0x19 0x16 0x40 0x0C 0x00 0x00 0x0F 0x00 ...
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... Si2401/Si3008 Table 22. Bit Mapped Register Summary “S” Register Register Bit 7 Register Address Name (hex) S07 0x07 MF1 S08 0x08 INTM CDM S09 0x09 INTS CD S0C 0x0C MF2 CDE S0D 0x0D MF3 S11 0x11 OFHI S13 0x13 MF4 S15 0x15 MLC ...
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... Address Name (hex) SF4 0xF4 DAA4 SF5 0xF5 DAA5 SF8 0xF8 DAA8 SF9 0xF9 DAA9 SFC 0xFC DAAFC CTSM Bit 6 Bit 5 Bit 4 Bit 3 ARL[1:0] LRV[3:0] Rev. 1.1 Si2401/Si3008 Bit 2 Bit 1 Bit 0 Default Binary ATL[1:0] 0000_1111 RT 0000_0000 — OVL ROV 0010_0000 0000_0000 37 ...
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... Si2401/Si3008 S07 (MF1). Modem Functions 1 Bit D7 D6 Name BD Type R/W Reset settings = 0000_0110 (0x06) Bit Name 7 Reserved Read returns zero Blind Dialing Disable Enable (Blind dialing occurs immediately after “ATDT#” command). 5 V23R V.23 Receive.* V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive. ...
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... A low to high transition in CID (S09, bit 2) activates INT. 1 Reserved Read returns zero. 0 REVM V.23 Reversal Detect Mask Change in REV does not affect INT low to high transition in REV (S09, bit 0) activates INT PPDM NVDM RIM R/W R/W R/W Function Rev. 1.1 Si2401/Si3008 CIDM REVM R/W R/W R/W 39 ...
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... Si2401/Si3008 S09 (INTS). Interrupt Status Bit D7 D6 Name CD WOR Type R/W R/W Reset settings = 0000_0000 (0x00) Bit Name 7 CD Carrier Detect (sticky). Active high bit indicates carrier detected (equivalent to inverse of CD pin). Clears on :1 read. 6 WOR Wake-on-Ring (sticky). Wake-on-ring has occurred. Clears on :I read. ...
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... Blind dialing disabled Enables blind dialing after dial timeout register S02 (CW) expires. 1 MLB Modem Loopback Not swapped Swaps frequency bands in modem algorithm loopback in a test mode. 0 Reserved Read returns zero 9BF R/W R/W Function Rev. 1.1 Si2401/Si3008 BDL MLB R/W R/W 41 ...
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... Si2401/Si3008 SOD (MF3). Modem Functions 3 Bit D7 D6 Name RI Type R/W Reset settings = 0000_0000 (0x00) Bit Name 7 Reserved Read returns zero Ring Indicator Control. Specifies the functionality of pin3 Pin 3 functions as GPIO5 controlled by register SE1 Pin 3 functions as RI. RI asserts during a ring and negates when no ring is present ...
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... Differential. 3 Reserved Read returns zero. 2 CIDB British Telecom Caller ID Decode Disable Enable. When set, SOC[6:5] is overwritten by the modem, as needed. 1 HDEN HDLC Framing Disable Enable. 0 Reserved Read returns zero Function OFHD R/W R/W Function Rev. 1.1 Si2401/Si3008 DCL[3:0] R CIDB HDEN R/W R/W 43 ...
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... Si2401/Si3008 S15 (MLC). Modem Link Control Bit D7 D6 Name ATPRE VCTE Type R/W R/W Reset settings = 0000_0100 (0x04) Bit Name 7 ATPRE Answer Tone Phase Reversal Disable Enable answer tone phase reversal. 6 VCTE V.25 Calling Tone Disable Enable V.25 calling tone. 5 FHGE 550 Hz Guardtone ...
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... Caller ID Gain. The Si2401 dynamically sets the On-Hook Analog Receive Gain SF4[6:4] (ARG) to CIDG during a caller ID event (or continuously if S0C[6:5] (CIDM = 11). This field should be set prior to caller ID operation. 000 = 0 dB 001 = 3 dB 010 = 6 dB 011 = 9 dB 100 = Function Rev. 1.1 Si2401/Si3008 CIDG[2:0] R/W 45 ...
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... Si2401/Si3008 S62 (RC). Result Codes Override Bit D7 D6 Name OCR Type R/W Reset settings = 0100_0001 (0x41) Bit Name 7 Reserved Read returns zero. 6 OCR Overcurrent Result Code (“x”). 0 = Enable Disable. 5:3 Reserved Read returns zero Intrusion Result Code (“I” and “i”). ...
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... Intrusion disabled from start of dial to register S29 time out Intrusion disabled from start of dial to carrier detect or to “N” or “n” result code. 0 Reserved Read returns zero LCLD R/W Function ® chipset goes off-hook and the off-hook intrusion Rev. 1.1 Si2401/Si3008 IB[1:0] R/W 47 ...
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... Si2401/Si3008 SDF (DGSR). Intrusion Deglitch Bit D7 D6 Name Type Reset settings = 0000_1100 (0x0C) Bit Name 7 Reserved Read returns zero. 6:0 DGSR[6:0] Deglitch Sample Rate. Sets the sample rate for the deglitch algorithm and the off-hook intrusion algorithm (40 ms units). 0000000 = Disables the deglitch algorithm, and sets the off-hook intrusion sample rate to 200 ms and delay between compared samples to 800 ms ...
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... Digital output (relay drive; also used for CD function Reserved Digital input. 1:0 GPIO1[1:0] GPIO1 Digital input Digital output (relay drive Reserved Reserved. *Note used as a GPIO pin; SE4[3] (GPE) must equal zero Function GPIO3[1:0] GPIO2[1:0] R/W R/W Function Rev. 1.1 Si2401/Si3008 GPD5 GPIO5 R/W R GPIO1[1:0] R/W 49 ...
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... Si2401/Si3008 SE3 (GPD). GPIO Data Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read returns zero. 3 GPD4 GPIO4 Data. Data = 0 Data = 1 2 GPD3 GPIO3 Data. Data = 0 Data = 1 1 GPD2 GPIO2 Data. Data = 0 Data = 1 0 GPD1 GPIO1 Data. ...
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... V.23 forward channel mark 1300 Hz (V23E = 1) V.23 backward channel mark 390 Hz (V23E = 1) User defined frequency 1 (USEN1 = 1) User defined frequency 2 (USEN1 = 1) Call progress filter A detected User defined frequency 3 (USEN2 = 1) User defined frequency 4 (USEN2 = 1) Call progress filter B detected Rev. 1.1 Si2401/Si3008 TONE[4:0] R Priority 1 2 ...
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... Si2401/Si3008 SE5 (DSP2). (SE8 = 0x02) Write Only Definition Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7 Reserved Always write this bit to zero. 6:3 DTM[3:0] Tone Type Generated. DTMF tone (0–15) to transmit when selected by TONC = 001. See Table 17 on page 26. ...
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... Enable the reporting of V.23 tones, 390 Hz and 1300 Hz. 1 ANSE Answering Tone Reporting Enable Disable Enable the reporting of answer tones. 0 DTMFE DTMF Tone Reporting Enable Disable Enable the reporting of DTMF tones USEN2 USEN1 W W Function Rev. 1.1 Si2401/Si3008 V23E ANSE DTMFE ...
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... Si2401/Si3008 SEB (TPD). Timer and Powerdown Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read returns zero. 3 PDDE Powerdown DSP Engine Power on Powerdown. 2:0 Reserved Read returns zero PDDE R/W Function Rev. 1 ...
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... Reserved This bit must always be written to zero RDLY[2:0] R/W Function Delay 0 ms 256 ms 512 ms 1792 ms Ring Confirmation Count Time 100 s m 150 s m 200 s m 256 s m 384 s m 512 s m 640 s m 1024 s m Rev. 1.1 Si2401/Si3008 RCC[2:0] R/W 55 ...
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... Si2401/Si3008 SED (RVC2). Ring Validation Control 2 Bit D7 D6 Name Type Reset settings = 0001_1001 (0x19) Bit Name 7:6 Reserved Read returns zero. 5:0 RAS[5:0] Ring Assertion Time. These bits set the minimum ring frequency for a valid ring signal. During ring qualification, a timer is loaded with the RAS[5:0] field upon a TIP/RING event and decrements at a reg- ular rate ...
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... At 20 Hz, TIP/RING events would occur every 1/( Hz ms. To calculate the cor- rect RMX[3:0] value for a frequency range [f_min, f_max], the following equation should be used: RMX[3: RAS[5:0] – – (1/(2 x f_max)). R/W Function Ring Timeout 128 s m 256 s m 1920 s m Rev. 1.1 Si2401/Si3008 RMX[3:0] R/W 57 ...
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... Si2401/Si3008 SF0 (DAA0). DAA Low Level Functions 0 Bit D7 D6 Name FOH[1:0] Type R/W Reset settings = 0100_0000 (0x40) Bit Name 7:6 FOH[1:0] Fast Off-Hook Selection. These bits determine the length of the off-hook counter. The default setting is 128 ms 512 128 5:2 Reserved Read returns zero. ...
Page 59
... The circuitry that forces the LVS register to all less is disabled. This reg- ister may display unpredictable values at voltages between All 0s are displayed if the line voltage Reserved Do not modify. 2 HBE Hybrid Transmit Path Connect Disable Enable. 1:0 Reserved Do not modify PDL LVFD R/W R/W Function Rev. 1.1 Si2401/Si3008 HBE R/W 59 ...
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... Si2401/Si3008 SF2 (DAA2). DAA Low Level Functions 2 Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read only. 3 FDT Frame Detect (Typically only used for board-level debug Indicates isolation capacitor frame lock has been established Indicates isolation capacitor frame lock has not been established. ...
Page 61
... 19.35 to 23.65 V SF8 (DAA8). DAA Low Level Functions 8 Bit D7 D6 Name LRV[3:0] Type Reset settings vary with line-side revision Bit Name 7:4 LRV[3:0] Line-Side Device Revision Number. 1001 = Si3008 Rev B 3:0 Reserved Do not modify Function RMS RMS Function Rev. 1.1 ...
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... Si2401/Si3008 SF9 (DAA9). DAA Low Level Functions 9 Read Only Bit D7 D6 Name Type Reset settings = 0010_0000 (0x20) Bit Name 7:3 Reserved Do not modify. 2 OVL Receive overload. Same as ROV, except not sticky. 1 ROV Receive Overload (sticky excessive level detected Excessive input level detected. ...
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... C2A Isolation Capacitor 2A. Connects to one side of the isolation capacitor C2. 10 C1A Isolation Capacitor 1A. Connects to one side of the isolation capacitor C1 GPIO1/EOFR CLKIN/XTALI XTALO 2 15 GPIO2/ GPIO3/ESC GPIO5/ GND RXD 12 TXD 6 11 GPIO4/INT/AOUT CTS 7 10 C1A 8 9 C2A RESET Description Rev. 1.1 Si2401/Si3008 63 ...
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... Si2401/Si3008 Pin # Pin Name 11 GPIO4/INT/ General Purpose Input/INT. AOUT This pin can be either a GPIO pin (digital in, digital out) or the INT pin. Default is digital in. When programmed as INT, this pin provides five functions. While the modem is connected, it asserts if the carrier is lost, a wake-on ring (using the “ATZ” command) event is detected, a loss of loop current event is detected, V ...
Page 65
... Pin Descriptions: Si3008 Pin # Pin Name 1 C1B Isolation Capacitor 1B. Connects to one side of isolation capacitor C1 and communicates with the Si2401. 2 C2B Isolation Capacitor 2B. Connects to one side of isolation capacitor C2 and communicates with the Si2401. 3 VREG Voltage regulator. Connects to an external capacitor to provide bypassing for an internal power supply. ...
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... Si2401/Si3008 10. Ordering Guide Chipset Description Si2401 Commercial lead-free 66 Power Supply Digital 3.3 V Si2401-FS Rev. 1.1 Line Temperature Si3008-B- °C ...
Page 67
... Millimeters Symbol Min Max A 1.35 1.75 A1 .10 .25 B .33 .51 C .19 .25 D 9.80 10.00 E 3.80 4.00 e 1.27 BSC H 5.80 6.20 h .25 .50 L .40 1.27 γ 0.10 θ 0º aaa 0.25 bbb 0.25 Rev. 1.1 Si2401/Si3008 h L Detail F C See Detail F 8º 67 ...
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... Si2401/Si3008 12. Package Outline: 8-Pin Exposed Pad SOIC Figure 7 illustrates the package details for the Si3008. Table 24 lists the values for the dimensions shown in the illustration. Figure 7. 8-pin Exposed Pad Small Outline Integrated Circuit (SOIC) Package 68 α Rev. 1.1 ...
Page 69
... Notes: 1. All dimensions shown are in millimeters (mm). 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Recommended card reflow profile is per the JEDEC/IPC J-STD- 020C specification for Small Body Components. Rev. 1.1 Si2401/Si3008 Millimeters Max 1.75 0.15 1.55 REF 0.51 0.25 5.00 2 ...
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... Si2401/Si3008 OCUMENT HANGE IST Revision 0.5 to Revision 1.0 Updated Table 2, “Loop Characteristics,” on page 4. Updated Table 4, “AC Characteristics,” on page 6. Updated Table 7, “Country-Specific PTT Specifications,” on page 11. Updated "12. Package Outline: 8-Pin Exposed Pad SOIC" on page 68. Revision 1.0 to Revision 1.1 Updated Table 7, “Country-Specific PTT Specifications,” ...
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... N : OTES Si2401/Si3008 Rev. 1.1 71 ...
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... Si2401/Si3008 C I ONTACT NFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: ISOinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...