FIN1104MTC Fairchild Semiconductor, FIN1104MTC Datasheet
FIN1104MTC
Specifications of FIN1104MTC
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FIN1104MTC Summary of contents
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... LVPECL, HSTL, and SSTL-2 for translation to LVDS. Ordering Code: Order Number Package Number FIN1104MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pin Descriptions ...
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Function Table Inputs Fail Safe Case HIGH Logic Level L LOW Logic Level X ...
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Absolute Maximum Ratings Supply Voltage ( LVDS DC Input Voltage ( LVDS DC Output Voltage (V ) OUT Driver Short Circuit Current (I ) Continuous 10 mA OSD Storage Temperature Range (T ) STG Max Junction ...
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AC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter t Differential Output Propagation Delay PLHD LOW-to-HIGH t Differential Output Propagation Delay PHLD HIGH-to-LOW t Differential Output Rise Time (20% to 80%) V TLHD t ...
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Note A: All LVTTL input pulses have frequency 10MHz, t Note B: C includes all probe and jig capacitances L FIGURE 5. Differential Driver Enable and Disable Circuit FIGURE 6. Enable and Disable AC Waveforms FIGURE 4. AC Waveform or ...
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Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to ...