PCA9509D,112 NXP Semiconductors, PCA9509D,112 Datasheet

IC I2C BUS REPEATER 8-SOIC

PCA9509D,112

Manufacturer Part Number
PCA9509D,112
Description
IC I2C BUS REPEATER 8-SOIC
Manufacturer
NXP Semiconductors
Type
Repeaterr
Datasheet

Specifications of PCA9509D,112

Tx/rx Type
I²C Logic
Delay Time
109ns
Capacitance - Input
2pF
Voltage - Supply
3 V ~ 5.5 V
Current - Supply
5mA
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3355-5
935282227112
PCA9509D
1. General description
2. Features
The PCA9509 is a level translating I
voltage 2-wire serial bus to interface with standard I
all the operating modes and features of the I
permits extension of the I
(SDA) and the clock (SCL) lines, thus enabling the I
capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from
1.0 V (as low as 0.95 V in special cases) to V
resistors due to the internal current source. Port B allows a voltage range from 3.0 V to
5.5 V and is overvoltage tolerant. Both port A and port B SDA and SCL pins are
high-impedance when the PCA9509 is unpowered.
The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current
sensing mechanism to detect the input or output LOW signal which prevents bus lock-up.
Port A uses a 1 mA current source for pull-up and a 200
a LOW on the port A accommodating smaller voltage swings. The output pull-down on the
port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the
internal buffer is set about 50 mV lower than that of the output voltage LOW. When the
port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This
prevents a lock-up condition from occurring. The output pull-down on the port B drives a
hard LOW and the input level is set at 0.3 of SMBus or I
enables port B to connect to any other I
The PCA9509 drivers are not enabled unless V
2.5 V. The enable (EN) pin can also be used to turn the drivers on and off under system
control. Caution should be observed to only change the state of the EN pin when the bus
is idle.
I
I
I
I
I
I
I
I
I
PCA9509
Level translating I
Rev. 05 — 10 July 2009
Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device
Voltage level translation from port A (1 V [0.95 V in special cases] to V
port B (3.0 V to 5.5 V)
Requires no external pull-up resistors on lower voltage port A
Active HIGH repeater enable input
Open-drain inputs/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Accommodates Standard-mode and Fast-mode I
Powered-off high-impedance I
2
C-bus by providing bidirectional buffering for both the data
2
C-bus/SMBus repeater
2
C-bus pins
2
C-bus/SMBus repeater that enables processor low
2
C-bus devices or buffer.
2
CC(B)
C-bus system during the level shifts, it also
CC(A)
2
2
1.0 V and requires no external pull-up
2
C-bus or SMBus I/O. While retaining
C-bus or SMBus maximum
is above 0.8 V and V
C-bus devices and multiple masters
2
C-bus voltage level which
pull-down driver. This results in
Product data sheet
CC(B)
CC(B)
is above
1.0 V) to

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PCA9509D,112 Summary of contents

Page 1

PCA9509 Level translating I Rev. 05 — 10 July 2009 1. General description The PCA9509 is a level translating I voltage 2-wire serial bus to interface with standard I all the operating modes and features of the I permits extension ...

Page 2

... NXP Semiconductors I Operating supply voltage range of 1.0 V (0. special cases port port tolerant port B SCL, SDA and enable pins 400 kHz clock frequency Remark: The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater. ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning V CC(A) Fig 2. Fig 4. 5.2 Pin description Table 2. Symbol V CC(A) [1] A1 [1] A2 GND EN [ CC(B) [1] Port A and port B can be used for either SCL or SDA. PCA9509_5 Product data sheet CC( PCA9509DP GND 002aac126 Pin configuration for TSSOP8 ...

Page 4

... NXP Semiconductors 6. Functional description Refer to The PCA9509 enables I low as 0. special cases) without degradation of system performance. The PCA9509 contains 2 bidirectional open-drain buffers specifically designed to support up-translation/down-translation between the low voltage and 3.3 V SMBus The port B I/Os are over-voltage tolerant to 5.5 V even when the device is unpowered. ...

Page 5

... NXP Semiconductors 2 6.2 I C-bus systems As with the standard I HIGH levels on the buffered bus (standard open-collector configuration of the I The size of these pull-up resistors depends on the system. Each of the port A I/Os has an internal pull-up current source and does not require the external pull-up resistor. Port B is designed to work with Standard-mode and Fast-mode I SMBus devices ...

Page 6

... NXP Semiconductors SCL SDA Fig 6. SCL SDA Fig 7. 8. Limiting values Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V CC(B) V CC(A) V I tot T stg T amb PCA9509_5 Product data sheet 9th clock pulse acknowledge 2 Bus B SMBus/I C-bus waveform ...

Page 7

... NXP Semiconductors 9. Static characteristics Table 4. Static characteristics GND = +85 C; unless otherwise specified. amb Symbol Parameter Supplies V supply voltage port B CC(B) V supply voltage port A CC(A) I supply current port A CC(A) I supply current port B CC(B) Input and output of port A (A1 to A2) V HIGH-level input voltage ...

Page 8

... NXP Semiconductors [2] If the PCA9509 is not being enabled or disabled, the V below the minimum specification of 450 A at cold temperature (see and fall times of the signals on port A since the I capacitance will result in a slower rise time and a longer transition time in general, however since the lower current is also associated with a lower voltage swing the delay is somewhat compensated ...

Page 9

... NXP Semiconductors 10. Dynamic characteristics Table 5. Dynamic characteristics Symbol Parameter 3.3 V CC(A) CC(B) t LOW to HIGH propagation delay PLH t HIGH to LOW propagation delay PHL t LOW to HIGH output transition time TLH t HIGH to LOW output transition time THL t LOW to HIGH propagation delay PLH t LOW to HIGH propagation delay 2 ...

Page 10

... NXP Semiconductors 10.1 AC waveforms input 0.5V CC(B) t PHL 70 % 0.5V 0.5V output CC( THL Fig 10. Propagation delay and transition times; port B to port A Fig 12. Propagation delay from the port A’s external driver switching off to port B LOW-to-HIGH transition; port A to port B 11. Test information Fig 13 ...

Page 11

... NXP Semiconductors 12. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... NXP Semiconductors XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm terminal 1 index area metal area not for soldering 2 1 terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.25 1.65 mm 0.5 0.00 ...

Page 14

... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 15

... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 16

... NXP Semiconductors Fig 17. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 8. Acronym CDM CMOS CPU ESD HBM I C-bus MM NMOS RC SMBus PCA9509_5 Product data sheet ...

Page 17

... NXP Semiconductors 15. Revision history Table 9. Revision history Document ID Release date PCA9509_5 20090710 • Modifications: Table 4 “Static split according to 2 different supply voltage conditions PCA9509_4 20090617 PCA9509_3 20090611 PCA9509_2 20070629 PCA9509_1 20060627 PCA9509_5 Product data sheet Data sheet status Product data sheet characteristics” ...

Page 18

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 19

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Enable 6.2 I C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Application design-in information . . . . . . . . . . 5 8 Limiting values Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 10.1 AC waveforms ...

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