SLXT915QC.B3 Intel, SLXT915QC.B3 Datasheet - Page 16

• Manufacturer Part Number: SLXT915QC.B3
• Description: IC QUAD ETHERNET REPEATER 64-QFP
• Manufacturer: Intel
• Type: Repeaterr

Specifications of SLXT915QC.B3

• Rohs Status: RoHS non-compliant
• Tx/rx Type: Ethernet
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 240mA
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Delay Time: -
• Capacitance - Input: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 831529

Intel
2.6
2.6.1
2.6.2
2.7
2.8
2.8.1
16
®
LXT915 Simple Quad Ethernet Repeater
AUI Port Operation
AUI Reception
The LXT915 AUI port receiver acquires data packets from the network (DIP/DIN). Only valid data
streams above the squelch level activate the receive function. If the differential signal at the DI
circuit inputs falls below 75% of the threshold level (unsquelched) for 8 bit times (typical), the AUI
receiver enters the idle state.
AUI Transmission
The LXT915 AUI port receives NRZ data from the repeater core, and passes it through a
Manchester encoder. The encoded data then goes out on the network (DOP/DON).
Collision Handling
A collision occurs when two or more repeater ports receive simultaneously, or when the AUI CIP/
CIN signal is active. The LXT915 fully complies with the IEEE 802.3 collision specifications, both
in individual and multi-repeater applications. In multiple-repeater configurations, collision
signaling on the IRB allows all repeaters to share collision parameters, acting as a single large
repeater.
IRCOL is a digital open-drain pin. IRCFS is an analog/digital port. The IRCOL and IRCFS lines
are pulled up globally (i.e., each signal requires one pull-up resistor for all boards). If there are
eight 3-repeater boards in the system, all eight boards share a single pull-up resistor for IRCOL and
a single pull-up resistor for IRCFS. The global pull-up may be located on one of the boards, or on
the backplane. The IRCFS line requires a precision (± 1%) resistor.
The IRENA, IRDAT and IRDEN lines are each pulled up locally (one pull-up resistor per board) if
external bus drivers are used. If no bus drivers are used then only one global pull-up per signal is
used.
LED Display
The LED display interface consists of seven integrated LED drivers, one for each of the five
network ports and two for common functions. Each pin provides a three-state pulsed output (+5 V,
high Z, and 0 V) which allows multiple conditions to be monitored and reported independently.
Table 6
shows the LED Driver output conditions and
associated with each of the five conditions.
LED Mode 0 (Default)
This mode is selected when LEDM1 and LEDM0 are floated or pulled low. Refer to
shows the LED Mode selected with each LEDM1 and LEDM0 combination.
Table 7
through
Table 10
list the repeater states
Table
Figure 5
Datasheet
7.