SLXT915QC.B3 Intel, SLXT915QC.B3 Datasheet - Page 9

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SLXT915QC.B3

Manufacturer Part Number
SLXT915QC.B3
Description
IC QUAD ETHERNET REPEATER 64-QFP
Manufacturer
Intel
Type
Repeaterr
Datasheet

Specifications of SLXT915QC.B3

Rohs Status
RoHS non-compliant
Tx/rx Type
Ethernet
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
240mA
Mounting Type
Surface Mount
Package / Case
64-QFP
Delay Time
-
Capacitance - Input
-
Lead Free Status / Rohs Status
Not Compliant
Other names
831529
Datasheet
1. IRENA and IRDAT can be buffered between boards in multi-board configurations. Where buffering is used, a 330 Ω pull-up
2. IRCFS and IRCOL cannot be buffered. In multi-board configurations, the total impedance on IRCOL should be no smaller
Pin
Pin
18
19
20
21
22
12
13
14
59
60
61
62
63
4
5
8
1
3
resistor can be used on each signal, on each board. Where no buffering is used, the total impedance should be no less than
330 Ω.
than 330 W. IRCFS should be pulled up only once, by a single 330 Ω, 1% resistor.
Table 3.
Table 4.
LEDTP1
LEDTP2
LEDTP3
LEDTP4
BCLKIO
A/SYNC
Symbol
LEDAUI
Symbol
IRDEN
IRENA
IRCFS
IRCOL
IRDAT
NC
Control, Status and Miscellaneous Signal Descriptions (Continued)
Inter-Repeater Backplane Signal Descriptions
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
_
I
TP Port LED Drivers. These tri-state LED drivers use an alternating pulsed output to
report TP port status. Each pin should be tied to a pair of LEDs (to the anode of one LED
and the cathode of a second LED). When connected this way, each pin reports five
separate conditions (receive, transmit, link integrity, reverse polarity and auto partition).
AUI Port LED Driver. This tri-state LED driver uses an alternating pulsed output to report
AUI port status. This pin should be tied to a pair of LEDs (to the anode of one LED and the
cathode of a second LED). When connected this way, this pin reports five separate
conditions (receive, transmit, receive jabber, receive collision and auto partition).
No Connects. Leave these pins unconnected (mandatory).
Backplane Clock. This 10 MHz clock synchronizes multiple repeaters on a common
backplane. In the synchronous mode, BCLKIO must be supplied to all repeaters from a
common external source. In the asynchronous mode, BCLKIO is supplied only when a
repeater is outputting data to the bus. Each repeater outputs its internally recovered clock
when it takes control of the bus. Other repeaters on the backplane then sync to BCLKIO for
the duration of the transmission.
Backplane Synch Mode Select. This pin selects the backplane synch mode. When this
pin is left floating an internal pull-up defaults to the Asynchronous mode (A/SYNC High). In
the asynchronous mode 12 or more LXT915s can be connected on the backplane, and an
external 10 MHz backplane clock source is not required. When the synchronous mode is
selected (A/SYNC tied Low), 32 or more LXT915s can be connected to the backplane and
an external 10 MHz backplane clock source is required.
Inter-Repeater Backplane Enable. This pin allows individual LXT915s to take control of
the Inter-Repeater Backplane (IRB) data bus (IRDAT). The IRENA bus must be pulled up
locally by a 330 Ω resistor.
IRB Data. This pin is used to pass data between multiple repeaters on the IRB. The IRDAT
bus must be pulled up locally by a 330 Ω resistor.
IRB Driver Enable. The IRDEN pin is used to enable external bus drivers which may be
required in synchronous systems with large backplanes. This is an active low signal,
maintained for the duration of the data transmission. IRDEN must be pulled up locally by a
330 Ω resistor.
IRB Collision Flag Sense (IRCFS) and IRB Collision (IRCOL). These two pins are used
for collision signalling between multiple LXT915 devices on the IRB. Both the IRCFS bus
and the IRCOL bus must be pulled up globally with 330 Ω resistors.
precision resistor [±1%].)
2
1
Intel
®
LXT915 Simple Quad Ethernet Repeater
Description
Description
1
1
(IRCFS requires a
9

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