PCA9543APW,112 NXP Semiconductors, PCA9543APW,112 Datasheet
PCA9543APW,112
Specifications of PCA9543APW,112
PCA9543APW
PCA9543APW
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PCA9543APW,112 Summary of contents
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PCA9543A/43B/43C 2-channel I Rev. 06 — 15 June 2009 1. General description The PCA9543A/43B/43C is a bidirectional translating switch, controlled by the I The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Any individual SCx/SDx channels or ...
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... NXP Semiconductors tolerant inputs 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO14, TSSOP14 3. Ordering information Table 1. ...
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... NXP Semiconductors 4. Block diagram SC0 SC1 SD0 SD1 RESET SCL SDA INT0 to INT1 Fig 1. PCA9543A_43B_43C_6 Product data sheet 2-channel I PCA9543A/43B/43C SWITCH CONTROL LOGIC POWER-ON RESET INPUT FILTER Block diagram of PCA9543A/43B/43C Rev. 06 — 15 June 2009 PCA9543A/43B/43C 2 C-bus switch with interrupt logic and reset ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning RESET Fig 2. 5.2 Pin description Table 3. Symbol A0 A1 RESET INT0 SD0 SC0 V SS INT1 SD1 SC1 INT SCL SDA V DD PCA9543A_43B_43C_6 Product data sheet 2-channel SDA 3 12 SCL PCA9543AD INT0 4 11 INT SD0 5 10 SC1 ...
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... NXP Semiconductors 6. Functional description Refer to 6.1 Device address Following a START condition, the bus master must output the address of the slave it is accessing. The address of the PCA9543A is shown in internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. ...
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... NXP Semiconductors 6.2.1 Control register definition One or several SCx/SDx downstream pair, or channel, is selected by the contents of the control register. This register is written after the PCA9543A has been addressed. The 2 LSBs of the control byte are used to determine which channel selected. When a channel is selected, the channel will become active after a STOP condition has been ...
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... NXP Semiconductors Remark: Two interrupts can be active at the same time. 6.3 RESET input The RESET input is an active LOW signal which may be used to recover from a bus fault condition. By asserting this signal LOW for a minimum of t its registers and I must be connected to V 6.4 Power-on reset ...
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... NXP Semiconductors Figure 8, we see that V 3 lower, so the PCA9543A supply voltage could be set to 3.3 V. Pull-up resistors can then be used to bring the bus voltages to their appropriate levels (see More Information can be found in Application Note AN262: PCA954X family of I multiplexers and switches . ...
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... NXP Semiconductors 7.3 System configuration A device generating a message is a ‘transmitter’, a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ (see SDA SCL ...
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... NXP Semiconductors 7.5 Bus transactions Data is transmitted to the PCA9543A control register using the Write mode as shown in Figure 13. SDA START condition Fig 13. Write control register Data is read from PCA9543A using the Read mode as shown in SDA Fig 14. Read control register PCA9543A_43B_43C_6 Product data sheet ...
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... NXP Semiconductors 8. Application design-in information 2 I C/SMBus master (1) If the device generating the interrupt has an open-drain output structure or can be 3-stated, a Fig 15. Typical application 9. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V (ground = 0 V). ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage ...
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... NXP Semiconductors Table 8. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t LOW period of the SCL clock LOW t HIGH period of the SCL clock ...
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... NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 16. Definition of timing on the I SCL SDA RESET 50 % Fig 17. Definition of RESET timing START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 18. I C-bus timing diagram PCA9543A_43B_43C_6 ...
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... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 12. Acronym CDM ESD HBM C-bus LSB MM MSB PCB SMBus PCA9543A_43B_43C_6 Product data sheet ...
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... NXP Semiconductors 15. Revision history Table 13. Revision history Document ID Release date PCA9543A_43B_43C_6 20090615 • Modifications: Table 9 “Dynamic – Symbol t – Symbol C PCA9543A_43B_43C_5 20081117 PCA9543A_43B_43C_4 20061020 PCA9543A_3 20050321 (9397 750 14316) PCA9543A_2 20040929 (9397 750 13988) PCA9543A_1 20040728 (9397 750 13299) PCA9543A_43B_43C_6 ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 6 6.2.2 Interrupt handling . . . . . . . . . . . . . . . . . . . . . . . 6 6.3 RESET input ...