W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 38
W83977G-A
Manufacturer Part Number
W83977G-A
Description
IC I/O CONTROLLER 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83977G-A.pdf
(182 pages)
Specifications of W83977G-A
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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5.2.2
This register is used to monitor several disk interface pins in PS/2 and Model 30 modes. In PS/2
mode, the bit definitions for this register are as follows:
Drive SEL0 (Bit 5):
This bit indicates the status of DO REGISTER bit 0 (drive select bit 0).
WDATA Toggle (Bit 4):
This bit changes state at every rising edge of the WD output pin.
RDATA Toggle (Bit 3):
This bit changes state at every rising edge of the RDATA output pin.
WE (Bit 2):
This bit indicates the complement of the WE output pin.
MOT EN B (Bit 1)
This bit indicates the complement of the MOB output pin.
MOT EN A (Bit 0)
This bit indicates the complement of the MOA output pin.
In PS/2 Model 30 mode, the bit definitions for this register are as follows:
0
1
DRV2 (Bit 7):
DSB (Bit 6):
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
A second drive has been installed
A second drive has not been installed
Status Register B (SB Register) (Read base address + 1)
7
1
7
6
1
6
5
5
4
4
3
3
-30
2
2
1
1
0
0
WD F/F
DSC
DSD
WE F/F
RDATA F/F
DSA
DSB
DRV2
MOT EN A
MOT EN B
WDATA Toggle
WE
RDATA Toggle
Drive SEL0
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