BLKD815EPFVU Intel, BLKD815EPFVU Datasheet - Page 44
BLKD815EPFVU
Manufacturer Part Number
BLKD815EPFVU
Description
Manufacturer
Intel
Datasheet
1.BLKD815EPFVU.pdf
(145 pages)
Specifications of BLKD815EPFVU
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.12 LAN Subsystem (Optional)
1.12.1 Intel
1.12.2 RJ-45 LAN Connector LEDs
44
The network interface controller subsystem consists of the ICH2, with integrated LAN Media
Access Controller (MAC), and a physical layer interface device. Features of the LAN subsystem
include:
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•
•
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The Intel 82562ET component provides an interface to the back panel RJ-45 connector with
integrated LEDs. This physical interface may alternately be provided through the CNR connector.
The Intel 82562ET provides the following functions:
•
•
•
•
•
•
Two LEDs are built into the RJ-45 LAN connector. Table 8 describes the LED states when the
board is powered up and the LAN subsystem is operating.
Table 8.
For information about
Obtaining LAN software and drivers
LED Color
Green
Yellow
PCI Bus Master Interface
CSMA/CD Protocol Engine
Serial CSMA/CD unit interface that supports the following physical layer interface devices:
82562ET onboard LAN
82562ET/MT (10/100 Mbit/sec Ethernet) on the optional CNR
82562EH (1 Mbit/sec HomePNA
PCI Power Management
Supports APM
Supports ACPI technology
Supports Wake up from suspend state (optional Wake on LAN technology)
Basic 10/100 Ethernet LAN Connectivity
Supports RJ-45 connector with status indicator LEDs
Full driver compatibility
Advanced Power Management support
Programmable transit threshold
Configuration EEPROM that contains the MAC address
LAN Connector LED States
®
LED State
Off
On
Off
On (steady state)
On (brighter and pulsing)
82562ET Platform LAN Connect Device
Condition
10 Mbit/sec data rate is selected.
100 Mbit/sec date rate is selected.
LAN link is not established.
LAN link is established.
The computer is communicating with another computer on
the LAN.
†
) on the optional CNR
Refer to
Section 1.3, page 18