74LV4053D,112 NXP Semiconductors, 74LV4053D,112 Datasheet
74LV4053D,112
Specifications of 74LV4053D,112
74LV4053D
935175860112
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74LV4053D,112 Summary of contents
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Triple single-pole double-throw analog switch Rev. 04 — 10 August 2009 1. General description The 74LV4053 is a triple single-pole double-throw (SPDT) analog switch, suitable for use as an analog or digital multiplexer/demultiplexer low-voltage Si-gate CMOS ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74LV4053N +125 C 74LV4053D +125 C 74LV4053DB +125 C 74LV4053PW +125 C 74LV4053BQ +125 C 4. Functional diagram Fig 1. Functional diagram 74LV4053_4 Product data sheet Name Description DIP16 plastic dual in-line package; 16 leads (300 mil) SO16 plastic small outline package ...
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... NXP Semiconductors Fig 2. Logic symbol from logic Fig 4. Schematic diagram (one switch) 74LV4053_4 Product data sheet 1Y0 12 1Y1 2Y0 2 2Y1 3Y0 5 3Y1 001aae125 Fig 3. Rev. 04 — 10 August 2009 74LV4053 Triple single-pole double-throw analog switch 6 EN MUX/DMUX 0 001aae126 IEC logic symbol 001aad544 © ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74LV4053 2Y1 2Y0 2Z 3Y1 1Y1 5 12 3Y0 1Y0 GND S3 001aak424 Fig 5. Pin configuration SOT38-4 and SOT109-1 5.2 Pin description Table 2. Pin description Symbol Pin GND 8 S1, S2, S3 11, 10, 9 1Y0, 2Y0, 3Y0 12 1Y1, 2Y1, 3Y1 ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Inputs [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage CC I input clamping current ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW T ambient temperature amb t/ V input transition rise and fall rate V [1] The static characteristics are guaranteed from V input levels GND Fig 8. ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL I input leakage current I I OFF-state leakage current S(OFF) I ON-state leakage current S(ON) I supply current CC I additional supply current ...
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... NXP Semiconductors 9.1 Test circuits and Fig 9. Test circuit for measuring OFF-state leakage current 9.2 ON resistance Table 7. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 12. Symbol Parameter R ON resistance (peak) ON(peak resistance mismatch ON between channels ...
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... NXP Semiconductors Table 7. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 12. Symbol Parameter R ON resistance (rail) ON(rail resistance (rail) ON(rail) [1] Typical values are measured at T [2] When supply voltages ( 1 recommended to use these devices only for transmitting digital signals. ...
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... NXP Semiconductors 9.3 On resistance waveform and test circuit Fig 11. Test circuit for measuring Fig 12. Typical function of input voltage ON 74LV4053_4 Product data sheet Triple single-pole double-throw analog switch nY0 nY1 2 E GND = V GND 200 150 100 1.2 2.4 Rev. 04 — 10 August 2009 ...
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... NXP Semiconductors 10. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay nYn nZ, nYn; see enable time E to nYn, nZ; see nYn, nZ; see 74LV4053_4 Product data sheet [2] Figure [ ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t disable time E to nYn, nZ; see dis nYn, nZ; see power dissipation capacitance V = GND [1] All typical values are measured the same as t and PLH ...
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... NXP Semiconductors 10.1 Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 13. nYn nZ, nYn propagation delays Sn, E input nYn or nZ output LOW-to-OFF OFF-to-LOW nYn or nZ output HIGH-to-OFF OFF-to-HIGH Measurement points are given in ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 15. Test circuit for measuring switching times Table 10. ...
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... NXP Semiconductors 10.2 Additional dynamic parameters Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V specified 6.0 ns amb Symbol Parameter THD total harmonic distortion frequency ( 3dB) response isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk [1] Adjust f voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 ). ...
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... NXP Semiconductors 10.2.1 Test circuits nY0 nY1 2 E 0.1 F GND = V GND f i Fig 16. Test circuit for measuring frequency response nY0 nY1 2 E 0.1 F GND = Fig 18. Test circuit for measuring isolation (OFF-state) 74LV4053_4 Product data sheet (dB switch 001aak355 Fig 17. Typical frequency response ...
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... NXP Semiconductors Fig 20. Test circuit for measuring total harmonic distortion Test circuit b. Input and output pulse definitions V may be connected Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch 74LV4053_4 Product data sheet nY0 switch nZ nY1 GND = V EE GND ...
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... NXP Semiconductors GND a. Switch closed condition GND b. Switch open condition Fig 22. Test circuit for measuring crosstalk between switches 74LV4053_4 Product data sheet nY0 nY1 E 0.1 F GND = Rev. 04 — 10 August 2009 74LV4053 Triple single-pole double-throw analog switch 001aak358 nY0 nY1 GND = V EE ...
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... NXP Semiconductors 11. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 25. Package outline SOT338-1 (SSOP16) ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74LV4053BQ (DHVQFN16 package) • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics 9.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 9.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 8 9.3 On resistance waveform and test circuit . . . . . 10 10 Dynamic characteristics ...