LFE3-17EA-6FN484C Lattice, LFE3-17EA-6FN484C Datasheet - Page 87
LFE3-17EA-6FN484C
Manufacturer Part Number
LFE3-17EA-6FN484C
Description
IC FPGA 17KLUTS 222I/O 484-BGA
Manufacturer
Lattice
Datasheet
1.LFE3-150EA-7FN672C.pdf
(136 pages)
Specifications of LFE3-17EA-6FN484C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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DC and Switching Characteristics
Lattice Semiconductor
LatticeECP3 Family Data Sheet
1, 2, 3, 4, 5, 6
LatticeECP3 Maximum I/O Buffer Speed (Continued)
Over Recommended Operating Conditions
Buffer
Description
Max.
Units
PCI33
PCI, V
= 3.3V
66
MHz
CCIO
1. These maximum speeds are characterized but not tested on every device.
2. Maximum I/O speed for differential output standards emulated with resistors depends on the layout.
3. LVCMOS timing is measured with the load specified in the Switching Test Conditions table of this document.
4. All speeds are measured at fast slew.
5. Actual system operation may vary depending on user logic implementation.
6. Maximum data rate equals 2 times the clock rate when utilizing DDR.
3-34
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