LFE2M20E-5F256C Lattice, LFE2M20E-5F256C Datasheet - Page 108
LFE2M20E-5F256C
Manufacturer Part Number
LFE2M20E-5F256C
Description
IC FPGA 20KLUTS 140I/O 256-BGA
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M20E-5F256C
Lead Free Status / Rohs Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M20E-5F256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LatticeECP2 Pin Information Summary, LFE2-20 and LFE2-35 (Cont.)
Available DDR-Interfaces per I/O
Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
4-8
PQFP
208
19
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
fpBGA
256
32
17
0
0
1
0
2
1
1
1
0
0
0
0
0
0
0
0
LFE2-20
LatticeECP2/M Family Data Sheet
fpBGA
484
46
46
0
0
2
0
3
3
2
2
0
0
0
0
0
0
0
0
fpBGA
672
50
68
0
0
2
2
3
4
3
2
0
0
0
0
0
0
0
0
Pinout Information
fpBGA
484
46
46
0
0
2
0
3
3
1
2
0
0
0
0
0
0
0
0
LFE2-35
fpBGA
672
54
68
0
0
3
2
3
4
3
3
0
0
0
0
0
0
0
0
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