XRP7740ILB-0X18-F Exar Corporation, XRP7740ILB-0X18-F Datasheet

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XRP7740ILB-0X18-F

Manufacturer Part Number
XRP7740ILB-0X18-F
Description
IC CTRLR PWM/LDO STP-DWN 40TQFN
Manufacturer
Exar Corporation
Series
-r
Datasheet

Specifications of XRP7740ILB-0X18-F

Topology
Step-Down (Buck) Synchronous (4), Linear (LDO) (1)
Function
Any Function
Number Of Outputs
5
Frequency - Switching
1.5MHz
Voltage/current - Output 1
Controller
Voltage/current - Output 2
Controller
Voltage/current - Output 3
Controller
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
6.5 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1016-1697
April 2011
GENERAL DESCRIPTION
The XRP7708 and XRP7740 are quad-output
pulse-width modulated (PWM) step-down DC-
DC controllers with a built-in LDO for standby
power and GPIOs. The devices provide a
complete power management solution in one
IC and are fully programmable via an I
serial interface. Independent Digital Pulse
Width Modulator (DPWM) channels regulate
output
protection functions such as current limiting
and over-voltage protection.
Each output voltage can be programmed from
0.9V to 5.1V without the need of an external
voltage
programmable
(from 300 KHz to 1.5 MHz) enables the user to
optimize between efficiency and component
size. Input voltage range is from 6.5V to 20V.
An I
the IC as well as to communicate with the host
for fault reporting and handling, power rail
parameters monitoring, etc.
The device offers a complete solution for soft-
start and soft-stop. The start-up delay and
ramp
independently controlled. The device can start
up a pre-biased PWM channel without causing
large negative inductor current.
TYPICAL APPLICATION DIAGRAM
Exar Corporation
48720 Kato Road, Fremont CA 94538, USA
2
C bus interface is provided to program
of
voltages
divider.
each
DPWM
and
The
PWM
provide
wide
switching
regulator
Fig. 1: XRP7708 or XRP7740 Application Diagram
range
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XRP7708
XRP7740
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frequency
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of
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APPLICATIONS
FEATURES
D
• Multi Channel Programmable
• Audio-Video Equipment
• Industrial & Telecom Equipment
• Processors & DSPs Based Equipment
• 4 Channel Step Down Controller
• 6.5V-20V Single Input Voltage Range
• Up to 6 Reconfigurable GPIO Pins
• Fully Programmable via I2C Interface
• Independent Digital Pulse Width
• Complete Monitoring and Reporting
• Complete Power Up/Down Sequencing
• Full On Board Protection
• Built-in 3.3V/5V LDO
• PowerArchitect™ Design Software
• Green/Halogen Free 40-pin TQFN
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Power Supplies
− 3ohm/1.8ohm driver – XRP7740
− 5ohm/1.8ohm driver – XRP7708
− Programmable Output Voltage 0.9V-5.1V
− Programmable 1.5MHz DPWM Frequency
Modulator (DPWM) channels
OTP, UVLO, OCP and OVP
Tel. +1 510 668-7000 – Fax. +1 510 668-7001
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Related parts for XRP7740ILB-0X18-F

XRP7740ILB-0X18-F Summary of contents

Page 1

... The device offers a complete solution for soft- start and soft-stop. The start-up delay and ramp of each PWM regulator independently controlled. The device can start up a pre-biased PWM channel without causing large negative inductor current. TYPICAL APPLICATION DIAGRAM Exar Corporation 48720 Kato Road, Fremont CA 94538, USA ...

Page 2

... VIN Supply Current Step Down Controllers Parameter VOUT Regulation Accuracy VOUT regulation range VOUT set point resolution VOUT set point resolution VOUT Input Current VOUT Input Resistance Note 1: Voltages above 5.1V can be obtained by using an external voltage divider. © 2011 Exar Corporation ...

Page 3

... Digital Input/Output Pins (GPIO0-GPIO5) 3.3V CMOS logic compatible, 5V tolerant Parameter Input Pin Low Level Input Pin High Level Input Pin Leakage Current Input pin Capacitance Output Pin Low Level Output Pin High Level Output Pin High Level (no load) © 2011 Exar Corporation ...

Page 4

... Capacitance for each I/O Pin Note the capacitance one one bus Gate Drivers Parameter GH, GL Rise and Fall Time GH, GL Pull-up On-State Output Resistance GH, GL Pull-up On-State Output Resistance GH, GL Pull-down On-State Output Resistance GH, GL Pull-down Off-State Output Resistance © 2011 Exar Corporation ...

Page 5

... BLOCK DIAGRAM VOUT1 PreScaler Vtar DAC VOUT2 PreScaler Vtar DAC VOUT3 VOUT4 VCC LDO VDD GPIO 0-3 GPIO SDA,SCL I2C © 2011 Exar Corporation Channel 1 Feedback Digital Hybrid ADC PID DPWM SS & PD Current 2-CH ADC 1 MUX Channel 2 – Feedback Digital Hybrid ...

Page 6

... Power Ground. Ground connection for the low side gate driver. Connect at low side FET 36,31,16,21 PGND1- PGND4 source. Output of the internal 1.8V LDO. A decoupling capacitor should be placed between AVDD 1 AVDD and AGND close to the chip (with short traces). © 2011 Exar Corporation ...

Page 7

... ORDERING INFORMATION Junction Temp Part Number Range XRP7708ILB- F -40°C≤T ≤+125°C J XRP7708ILBTR-F -40°C≤T ≤+125°C J XRP7740ILB- F -40°C≤T ≤+125°C J XRP7740ILBTR-F -40°C≤T ≤+125°C J XRP7740ILB-0X180-F -40°C≤T ≤+125°C J XRP7740ILBTR-0X18-F -40°C≤T ≤ ...

Page 8

... Fig. 4: 12Vin Efficiency: Single Channel 300kHz - Channels not in use are disabled FET: Si4944; Inductor: 744314xxx 7x7x5mm Fig. 6: 12Vin Efficiency: Single Channel 300kHz - Channels not in use are disabled FET: FDS8984; Inductor:744310200 7x7x3mm Fig. 8: Simultaneous Start-up Configuration CH1:3.3V CH2:5V CH3:1V CH4:1.8V © 2011 Exar Corporation ...

Page 9

... Fig. 10: Sequential Start-up Configuration CH1:3.3V CH2:5V CH3:1V CH4:1.8V Fig. 12: Startup into 3V prebias – 5V Output CH1: Vout(5V) Fig. 14: Load Transient Response CH1:Iout (1A/div) CH2: Vout (3.3V) © 2011 Exar Corporation Fig. 11: Sequential Soft-Stop Configuration CH1:5V CH2:3.3V CH3:1.8V CH4:1.2V Fig. 13: Sequential Soft-Stop Configuration Vout Shutdown = 0 ...

Page 10

... Fig. 15:XRP7708 Temperature Regulation 1.8V out (+/- 1% Vo window) Fig. 177: XRP7740 Temperature Regulation 1.8V out (+/- 1% Vo window) © 2011 Exar Corporation Fig. 16:XRP7708 Temperature Regulation Fig. 188:XRP7740 Temperature Regulation 10/ 1.0V out (+/- 1% Vo window) 1.0V out (+/- 1% Vo window) Rev. 1.2 ...

Page 11

... Fault reporting (including OCP, OVP, Temperature, Soft-Start in progress, Power Good) − Allows a Logic Level interface with other non-digital IC’ logic inputs to other devices − Possible to configure as traditional ‘enable’ pin for all 4 outputs © 2011 Exar Corporation ...

Page 12

... AVDD is regulating to ensure proper loading of the configuration registers. For systems that control the Enable signal through a microcontroller or other processor, this is simply a matter of providing the proper delay to the Enable signal after © 2011 Exar Corporation Q u ...

Page 13

... When the Enable is asserted, the chip will power up and VCCA will regulate at 5.1V. If our device is sequenced properly, VCCA will achieve 5.1V then drop down to 4.6V and toggle back to 5.1V. See Figure 22 for an example. © 2011 Exar Corporation Q u ...

Page 14

... Over Temperature Protection (OTP) monitors the temperature of the chip, and the chip • will shutdown all channels if the temperature rises to critical levels. Over Voltage Protection (OVP) monitors the voltage of channel and will shutdown the • channel if it surpasses its voltage threshold. © 2011 Exar Corporation ...

Page 15

... The actual over temperature threshold can be set by the user by using a 7bit SET_THERMAL_SHDN register with an LSB of 5K. If the over temperature fault condition clears, then the IC can be set to restart the chip automatically. The restart temperature threshold can be set by the SET_THERMAL_RESTART register. © 2011 Exar Corporation ...

Page 16

... For the Voltage Target of 2.6V to 5.1V, the VOUT OVP Threshold is 300mV to 600mV. Once the over-voltage SET_FAULT_RESP_CONFIG_LB and SET_FAULT_RESP_CONFIG_HB to determine whether there are any “following” channels that need to be shut down. Any following channel will be disabled when © 2011 Exar Corporation ...

Page 17

... The controller will also set the fault flags in READ_OVC_FAULT_WARN register. Typically the over-current fault threshold would be set to 130-140% of the maximum desirable output current. This will help avoid any over-current conditions caused by transients that would shut down the output channel. © 2011 Exar Corporation ...

Page 18

... Bits [15:10] specify the delay after disabling a channel but before starting the shutdown of the channel; where each bit represents 250us steps. Bits [9:0] specify the fall time of the channel; these 10 bits define the number of microseconds for each 50mV increment to reach the discharge threshold. Enable Signal Vout © 2011 Exar Corporation ...

Page 19

... XRP7708 is 40ns example the minimum duty cycle is 4% for 1MHz PWM frequency. This is important since the minimum on time dictates the maximum conversion ratio that the PWM controller can achieve. © 2011 Exar Corporation ...

Page 20

... YNCHRONIZATION The user of the XRP7708 can choose to use an external source as the primary clock for the XRP7708. This function can be configured using the SET_SYNC_MODE_CONFIG register. This register sets the operation of the XRP7708 when an external clock is required. By selecting the © 2011 Exar Corporation ...

Page 21

... When powering in sync mode the slave unit will initially power up with its internal clock to transfer the configuration memory. Once this transfer occurs, then the unit is set to function as a slave unit. In turn the unit will take the external clock provided by the master to run as its main internal clock. © 2011 Exar Corporation Q u ...

Page 22

... C bus. This GPIO_CONFIG register allows the user close to 100 different configuration functions that the GPIO can be programmed to do. NOTE: the GPIO Pins (and all I/Os) should NOT be driven without a 10K resistor when VIN is not being applied to the IC. © 2011 Exar Corporation ...

Page 23

... This 7-bit I address is stored in the NVM. One can program a blank device with the 7-bit Slave address or select one of the preprogrammed options. The 7-bit address plus the R/W bit create an 8-bit data value that is sent on the bus. © 2011 Exar Corporation ...

Page 24

... The XRP7740ILB-0X18-F has data value of 0x30 and read by sending a data value of 0x31. This reflects the address being shifted one bit to the left and the least significant bit being set to reflect a read or write operation in order to stuff the byte correctly. The second byte sent to the device is the location of a specific register. ...

Page 25

... Iout is the DC output current D is the duty cycle In general, the total input voltage ripple should be kept below 1.5% of VIN. The input voltage ripple also has two major components: the voltage drop on the main capacitor voltage drop due to ESR - calculated from: © 2011 Exar Corporation ...

Page 26

... A simplified expression for conduction losses is given by: MOSFET’s junction temperature can be estimated from: This assumes that the switching loss is the same as the conduction loss. thermal resistance from junction to ambient AYOUT UIDELINES Refer to application note ANP-32 “Practical Layout Guidelines for Power © 2011 Exar Corporation ...

Page 27

... PACKAGE SPECIFICATION © 2011 Exar Corporation 27/ 40-PIN 6MMX6MM TQFN Rev. 1.2 ...

Page 28

... While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ...

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