IDT74LVC16646APV IDT, Integrated Device Technology Inc, IDT74LVC16646APV Datasheet

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IDT74LVC16646APV

Manufacturer Part Number
IDT74LVC16646APV
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT74LVC16646APV

Logic Family
LVC
Operating Supply Voltage (typ)
3.3V
Propagation Delay Time
9.2ns
Number Of Elements
2
Number Of Channels
16
Input Logic Level
LVTTL
Output Logic Level
LVTTL
Output Type
3-State
Package Type
SSOP
Polarity
Non-Inverting
Logical Function
Bus Transceiver/Register
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Technology
CMOS
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
FEATURES:
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©
IDT74LVC16646A
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
1
1
machine model (C = 200pF, R = 0)
CLKBA
CLKAB
2004 Integrated Device Technology, Inc.
1
CC
CC
1
1
DIR
SBA
SAB
1
1
OE
A
= 3.3V ± 0.3V, Normal Range
= 2.7V to 3.6V, Extended Range
1
1
56
5
2
3
55
54
SK(o)
(Output Skew) < 250ps
A REG
1D
C1
TO SEVEN OTHER CHANNELS
3.3V CMOS 16-BIT BUS
TRANSCEIVER/REGISTER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
B REG
C1
1D
52
1
B
2
2
1
1
CLKBA
CLKAB
DESCRIPTION:
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit D-type transceivers with 3-state D-type
registers. The control circuitry is organized for multiplexed transmission of
data between the A bus and B bus either directly or from the internal storage
registers. Each 8-bit transceiver/register features direction control (DIR),
over-riding Output Enable control (OE) and Select lines (SAB and SBA) to
select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
can be stored in the internal registers by the low-to-high transitions at the
appropriate clock pins. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved noise margin.
the use of this device as a translator in a mixed 3.3V/5V supply system.
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
2
2
2
DIR
SBA
SAB
2
2
The LVC16646A 16-bit bus transceiver/register is built using advanced
All pins can be driven from either 3.3V or 5V devices. This feature allows
The LVC16646A has been designed with a ±24mA output driver. The
OE
A
1
15
30
31
27
26
29
28
A REG
1D
C1
TO SEVEN OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC16646A
OCTOBER 2008
B REG
C1
1D
DSC-4488/4
42
2
B
1

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IDT74LVC16646APV Summary of contents

Page 1

... WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O DESCRIPTION: The LVC16646A 16-bit bus transceiver/register is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as two independent 8-bit D-type transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between the A bus and B bus either directly or from the internal storage registers ...

Page 2

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER PIN CONFIGURATION 1 1DIR 2 1CLKAB 3 SAB 1 4 GND GND GND GND 25 26 SAB 2 27 CLKAB 2 28 DIR 2 SSOP/ TSSOP TOP VIEW ABSOLUTE MAXIMUM RATINGS Symbol V TERM T 56 STG 1OE I OUT 1CLKBA SBA GND NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause ...

Page 3

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER FUNCTION TABLE (1) Inputs xOE xDIR xCLKAB xCLKBA ↑ ↑ NOTES HIGH Voltage Level X = Don’t Care L = LOW Voltage Level ↑ = LOW-to-HIGH transition 2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs ...

Page 4

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER BUS A xCLKBA xDIR xOE xCLKAB REAL-TIME TRANSFER BUS BUS A xOE xCLKAB xCLKBA xDIR ↑ ↑ ↑ ↑ STORAGE FROM AND B BUS B xSAB xSBA xDIR BUS BUS A B (1) xSAB xSBA xDIR NOTE: 1. Cannot transfer data to A Bus and B Bus simultaneously. ...

Page 5

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate – 40° 85°C. A OPERATING CHARACTERISTICS, V ...

Page 6

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER SWITCHING CHARACTERISTICS Symbol Parameter f MAX t Propagation Delay PLH t xAx to xBx or xBx to xAx PHL t Propagation Delay PLH t CLKBA to xAx, CLKAB to xBx PHL t Propagation Delay PLH t xSBA or xSAB to xAx or xBx PHL t Output Enable Time PZH t xOE to xAx or Bx ...

Page 7

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 300 LZ V 300 300 OUT Pulse (1, 2) D.U.T. Generator R T Test Circuit for All Outputs DEFINITIONS Load capacitance: includes jig and probe capacitance. ...

Page 8

... IDT74LVC16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER ORDERING INFORMATION LVC Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 XX XXXX Package Device Type PV PA 646A 16 Blank 74 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 8 INDUSTRIAL TEMPERATURE RANGE Shrink Small Outline Package ...

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