EPM7256AQC208-10 Altera, EPM7256AQC208-10 Datasheet - Page 12

• Manufacturer Part Number: EPM7256AQC208-10
• Manufacturer: Altera

Specifications of EPM7256AQC208-10

• Family Name: MAX 7000A
• Memory Type: EEPROM
• # Macrocells: 256
• Number Of Usable Gates: 5000
• Frequency (max): 125MHz
• Propagation Delay Time: 10ns
• Number Of Logic Blocks/elements: 16
• # I/os (max): 164
• Operating Supply Voltage (typ): 3.3V
• In System Programmable: Yes
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

MAX 7000A Programmable Logic Device Data Sheet
Figure 4. MAX 7000A Parallel Expanders
12
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
36 Signals
from PIA
Expanders
16 Shared
Programmable Interconnect Array
Logic is routed between LABs on the PIA. This global bus is a
programmable path that connects any signal source to any destination on
the device. All MAX 7000A dedicated inputs, I/O pins, and macrocell
outputs feed the PIA, which makes the signals available throughout the
entire device. Only the signals required by each LAB are actually routed
from the PIA into the LAB.
into the LAB. An EEPROM cell controls one input to a 2-input AND gate,
which selects a PIA signal to drive into the LAB.
Product-
Product-
Select
Select
Matrix
Matrix
Term
Term
Macrocell
Previous
From
Figure 5
shows how the PIA signals are routed
Macrocell
To Next
Preset
Preset
Clock
Clear
Clock
Clear
Altera Corporation
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic