MC68HC711E9FU Freescale Semiconductor, MC68HC711E9FU Datasheet - Page 145

MC68HC711E9FU

Manufacturer Part Number
MC68HC711E9FU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC711E9FU

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
12KB
Total Internal Ram Size
512Byte
# I/os (max)
38
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711E9FU
Manufacturer:
MOT
Quantity:
47
9.7.1 Pulse Accumulator Control Register
Four of this register’s bits control an 8-bit pulse accumulator system. Another bit enables either the OC5
function or the IC4 function, while two other bits select the rate for the real-time interrupt system.
DDRA7 — Data Direction for Port A Bit 7
PAEN — Pulse Accumulator System Enable Bit
PAMOD — Pulse Accumulator Mode Bit
PEDGE — Pulse Accumulator Edge Control Bit
DDRA3 — Data Direction for Port A Bit 3
I4/O5 — Input Capture 4/Output Compare 5 Bit
RTR[1:0] — RTI Interrupt Rate Select Bits
Freescale Semiconductor
Refer to
This bit has different meanings depending on the state of the PAMOD bit, as shown in
Refer to
Refer to
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
0 = Event counter
1 = Gated time accumulation
0 = Output compare 5 function enable (no IC4)
1 = Input capture 4 function enable (no OC5)
Chapter 6 Parallel Input/Output (I/O)
Chapter 6 Parallel Input/Output (I/O)
9.5 Real-Time Interrupt
Address:
Reset:
Read:
Write:
Figure 9-25. Pulse Accumulator Control Register (PACTL)
DDRA7
$1026
PAMOD
Bit 7
0
0
0
1
1
Table 9-7. Pulse Accumulator Edge Control
PAEN
6
0
PEDGE
M68HC11E Family Data Sheet, Rev. 5.1
(RTI).
0
1
0
1
PAMOD
5
0
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A 0 on PAI inhibits counting.
A 1 on PAI inhibits counting.
PEDGE
Ports.
Ports.
4
0
Action on Clock
DDRA3
3
0
I4/O5
2
0
RTR1
1
0
RTR0
Bit 0
Pulse Accumulator
0
Table
9-7.
145

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