M93S66-MN6T STMicroelectronics, M93S66-MN6T Datasheet

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M93S66-MN6T

Manufacturer Part Number
M93S66-MN6T
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of M93S66-MN6T

Density
4Kb
Interface Type
Serial (Microwire)
Organization
256x16
Frequency (max)
2MHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
5V
Package Type
SOIC N
Operating Temp Range
-40C to 85C
Supply Current
2mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
M93S66-MN6T
Manufacturer:
STM
Quantity:
4 354
Part Number:
M93S66-MN6T/Q
Manufacturer:
ST
0
FEATURES SUMMARY
April 2004
Industry Standard MICROWIRE Bus
Single Supply Voltage:
Single Organization: by Word (x16)
Programming Instructions that work on: Word
or Entire Memory
Self-timed Programming Cycle with Auto-
Erase
User Defined Write Protected Area
Page Write Mode (4 words)
Ready/Busy Signal During Programming
Speed:
Sequential Read Operation
Enhanced ESD/Latch-Up Behavior
More than 1 Million Erase/Write Cycles
More than 40 Year Data Retention
MICROWIRE Serial Access EEPROM with Block Protection
4.5 to 5.5V for M93Sx6
2.5 to 5.5V for M93Sx6-W
1.8 to 5.5V for M93Sx6-R
1MHz Clock Rate, 10ms Write Time
(Current product, identified by process
identification letter F or M)
2MHz Clock Rate, 5ms Write Time (New
Product, identified by process
identification letter W or G)
4Kbit, 2Kbit and 1Kbit (16-bit wide)
Figure 1. Packages
M93S66, M93S56
3x3mm body size
TSSOP8 (DW)
TSSOP8 (DS)
8
150 mil width
169 mil width
8
PDIP8 (BN)
SO8 (MN)
1
1
M93S46
1/34

Related parts for M93S66-MN6T

M93S66-MN6T Summary of contents

Page 1

... Clock Rate, 5ms Write Time (New Product, identified by process identification letter Sequential Read Operation Enhanced ESD/Latch-Up Behavior More than 1 Million Erase/Write Cycles More than 40 Year Data Retention April 2004 M93S66, M93S56 4Kbit, 2Kbit and 1Kbit (16-bit wide) Figure 1. Packages 8 PDIP8 (BN) 8 SO8 (MN) 150 mil width ...

Page 2

... Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. DIP, SO and TSSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 POWER-ON DATA PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Instruction Set for the M93S46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Instruction Set for the M93S66, M93S56 Figure 4. READ, WRITE, WEN and WDS Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Write Enable and Write Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. PAWRITE and WRAL Sequence Page Write ...

Page 3

... Figure 16.TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . 31 Table 23. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data . . . . . . . . . . . . 31 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 24. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 25. How to Identify Current and New Products by the Process Identification Letter . . . . . . . 32 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 26. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 M93S66, M93S56, M93S46 3/34 ...

Page 4

... High, the M93Sx6 can output a sequential stream of data words. In this way, the memory can be read as a data stream from 16 to 4096 bits (for the M93S66), or continuously as the address counter automatically rolls over to 00h when the highest address is reached. Within the time required by a programming cycle ...

Page 5

... The address bits of the byte or word that is to 6.. be accessed. For the M93S46, the address is made bits (see M93S56 and M93S66, the address is made bits (see The M93Sx6 devices are fabricated in CMOS technology and are therefore able to run as slow (static input signals fast as the max- ...

Page 6

... M93S66, M93S56, M93S46 Table 2. Instruction Set for the M93S46 Instruction Description W Read Data READ X from Memory Write Data to WRITE 1 Memory Page Write to PAWRITE 1 Memory Write All Memory WRAL 1 with same Data WEN Write Enable 1 WDS Write Disable X Protection PRREAD X Register Read ...

Page 7

... Table 3. Instruction Set for the M93S66, M93S56 Instruction Description W Read Data READ X from Memory Write Data to WRITE 1 Memory Page Write to PAWRITE 1 Memory Write All Memory WRAL 1 with same Data WEN Write Enable 1 WDS Write Disable X Protection PRREAD X Register Read Protection PRWRITE ...

Page 8

... M93S66, M93S56, M93S46 Figure 4. READ, WRITE, WEN and WDS Sequences READ PRE WRITE PRE WRITE PRE ENABLE Note: For the meanings of An, Xn, Qn and Dn, see 8/ ADDR DATA OUT OP CODE ADDR DATA IN OP CODE WRITE DISABLE CODE Table 2. and Table 3.. Q0 CHECK ...

Page 9

... High, and remains in this state until a new start bit is decoded or the Chip Select Input (S) is brought Low. Programming is internally self-timed, so the exter- nal Serial Clock (C) may be disconnected or left running after the start of a write cycle. M93S66, M93S56, M93S46 ) before the status information SLSH 9/34 ...

Page 10

... After the receipt of each data word, bits A1-A0 of the internal address register are incremented, the high order bits remaining unchanged (A7-A2 for M93S66, M93S56; A5-A2 for M93S46). Users must take care, in the software, to ensure that the last word address has the same upper order ad- dress bits as the initial address transmitted to avoid address roll-over ...

Page 11

... Memory with same Data (WRAL) instruction simul- taneously writes the whole memory with the same data word given in the instruction. M93S66, M93S56, M93S46 Write Enable (W) must be held High before and during the instruction. Input address and data, on Serial Data Input (D) are sampled on the rising edge of Serial Clock (C) ...

Page 12

... M93S66, M93S56, M93S46 Figure 6. PREAD, PRWRITE and PREN Sequences Protect Register READ Protect Register WRITE Protect Register ENABLE Note: For the meanings of An, Xn and Dn, please see 12/34 PRE ADDR DATA OUT OP CODE PRE ADDR BUSY OP CODE PRE CODE Table 2. and Table 3 ...

Page 13

... Figure 7. PRCLEAR and PRDS Sequences Protect Register CLEAR Protect Register DISABLE Note: For the meanings of An, Xn and Dn, please see PRE ADDR BUSY OP CODE PRE ADDR BUSY OP CODE Table 2. and Table 3.. M93S66, M93S56, M93S46 CHECK STATUS READY CHECK STATUS READY AI00892C 13/34 ...

Page 14

... M93S66, M93S56, M93S46 WRITE PROTECTION AND THE PROTECTION REGISTER The Protection Register on the M93Sx6 is used to adjust the amount of memory that write protected. The write protected area extends from the address given in the Protection Register the top address in the M93Sx6 device. Two flag bits are used to indicate the Protection Register status: – ...

Page 15

... The number of clock cycles expected for each in- struction, and for each member of the M93Sx6 family, are summarized in example, a Write Data to Memory (WRITE) in- Figure struction on the M93S56 (or M93S66) expects 27 clock cycles from the start bit to the falling edge of Chip Select Input (S). That is: M93S66, M93S56, M93S46 An-2 ...

Page 16

... M93S66, M93S56, M93S46 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings" table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not im- Table 4 ...

Page 17

... Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parame- ters. Parameter Parameter Parameter Parameter Parameter M93S66, M93S56, M93S46 Min. Max. Unit 4.5 5.5 V –40 85 °C –40 125 ° ...

Page 18

... M93S66, M93S56, M93S46 Figure 9. AC Testing Input Output Waveforms 0.8V CC 0.2V CC Table 10. Capacitance Symbol Parameter C Output OUT Capacitance C Input IN Capacitance Note: Sampled only, not 100% tested 18/34 M93SXX 2. 0.4V INPUT OUTPUT M93SXX-W & M93SXX-R Test Condition OUT =25°C and a frequency of 1 MHz. ...

Page 19

... Product MHz, New Product Current Product New Product ± 10 ± 2.1mA 5V –400µ M93S66, M93S56, M93S46 Min. Max. Unit ±2.5 µA ±2.5 µA 1 µA 15 µA –0.45 0 0.4 V 2.4 V Min. Max. Unit ±2.5 µA ±2.5 µA 1 µA 15 µA – ...

Page 20

... M93S66, M93S56, M93S46 Table 13. DC Characteristics (M93Sx6-W, Device Grade 6) Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO Supply Current (CMOS I CC Inputs) I Supply Current (Stand-by) CC1 V Input Low Voltage ( Input High Voltage ( Output Low Voltage ( Output High Voltage (Q) OH Note: 1. Current product: identified by Process Identification letter ...

Page 21

... Supply Current (Stand-by) CC1 V Input Low Voltage ( Input High Voltage ( Output Low Voltage ( Output High Voltage (Q) OH Note: 1. Preliminary Data: this product is under development. For more infomation, please contact your nearest ST sales office. M93S66, M93S56, M93S46 Test Condition Hi-Z OUT 5V MHz ...

Page 22

... M93S66, M93S56, M93S46 Table 16. AC Characteristics (M93Sx6, Device Grade Test conditions specified in Symbol Alt Clock Frequency Protect Enable Valid to Clock High PRVCH PRES t t Write Enable Valid to Clock High WVCH PES t t Clock Low to Protect Enable Transition CLPRX PREH Chip Select Low to Write Enable ...

Page 23

... Chip Select Input (S) must be brought Low for a minimum of tSLSH between consecutive instruction cycles. 3. Current product: identified by Process Identification letter New product: identified by Process Identification letter Table 9. 3 Parameter Min. D. 250 250 100 1000 350 250 100 100 100 0 M93S66, M93S56, M93S46 and Table Max. Min. Max 250 50 50 200 200 200 ...

Page 24

... M93S66, M93S56, M93S46 Table 18. AC Characteristics (M93Sx6-W, Device Grade 3) Test conditions specified in Symbol Alt Clock Frequency Protect Enable Valid to Clock High PRVCH PRES t t Write Enable Valid to Clock High WVCH PES t t Clock Low to Protect Enable Transition CLPRX PREH t t Chip Select Low to Write Enable Transition ...

Page 25

... C 2. Chip Select Input (S) must be brought Low for a minimum of tSLSH between consecutive instruction cycles. 3. Preliminary Data: this product is under development. For more infomation, please contact your nearest ST sales office. Table 9. and Table 7. Parameter M93S66, M93S56, M93S46 3 3 Unit Min. Max. D.C. ...

Page 26

... M93S66, M93S56, M93S46 Figure 10. Synchronous Timing (Start and Op-Code Input) PRE Figure 11. Synchronous Timing (Read or Write tDVCH D An Hi-Z Q ADDRESS INPUT 26/34 tPRVCH tWVCH tCLSH tSHCH tDVCH START OP CODE OP CODE INPUT START tCHDX A0 tCHQL tCHCL tCLCH tCHDX OP CODE AI02025 tCLSL tCHQV ...

Page 27

... Figure 12. Synchronous Timing (Read or Write) PRE tDVCH tCHDX A0/D0 Hi-Z ADDRESS/DATA INPUT M93S66, M93S56, M93S46 tCLPRX tSLWX tSLCH tCLSL tSLSH tSHQV tSLQZ BUSY READY tW WRITE CYCLE AI02027 27/34 ...

Page 28

... M93S66, M93S56, M93S46 PACKAGE MECHANICAL Figure 13. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline Note: Drawing is not to scale. Table 20. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data Symb. Typ 3.30 b 0.46 b2 1.52 c 0.25 D 9.27 E 7. ...

Page 29

... M93S66, M93S56, M93S46 h x 45˚ inches Typ. Min. 0.053 0.004 0.013 0.007 0.189 0.150 0.050 – 0.228 0.010 0.016 0° 8 Max. ...

Page 30

... M93S66, M93S56, M93S46 Figure 15. TSSOP8 3x3mm² – 8 lead Thin Shrink Small Outline, 3x3mm² body size, Package Outline A CP Note: Drawing is not to scale. Table 22. TSSOP8 3x3mm² – 8 lead Thin Shrink Small Outline, 3x3mm² body size, Mechanical Data Symbol Typ ...

Page 31

... M93S66, M93S56, M93S46 TSSOP8AM inches Typ. Min. 0.0020 0.0394 0.0315 0.0075 0.0035 0.1181 0.1142 0.0256 – 0.2520 0.2441 0.1732 0.1693 ...

Page 32

... M93S66, M93S56, M93S46 PART NUMBERING Table 24. Ordering Information Scheme Example: Device Type M93 = MICROWIRE serial access EEPROM (x16) with Block Protection Device Function Kbit (256 x 16 Kbit (128 x 16 Kbit (64 x 16) Operating Voltage blank = V = 4 2 1.8 to 5.5V CC Package ...

Page 33

... RoHS compliant devices. Device Grade 3 clarified, with reference to HRCF and automotive environments. Process identification letter “G” information added Description of Revision separated from V in the Absolute Maximum Ratings table IN IO (min) and V IO M93S66, M93S56, M93S46 (min) improved to -0.45V. IL (min) changed. Soldering temperature CC 33/34 ...

Page 34

... M93S66, M93S56, M93S46 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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