CY26049ZC-36 Cypress Semiconductor Corp, CY26049ZC-36 Datasheet

CY26049ZC-36

Manufacturer Part Number

CY26049ZC-36

Description

Manufacturer

Cypress Semiconductor Corp

Type

PLL Frequency Synthesizerr

Datasheet

1.CY26049ZC-36.pdf (8 pages)

Specifications of CY26049ZC-36

Number Of Elements

Supply Current

45mA

Pll Input Freq (min)

10/0.008(Typ)MHz

Pll Input Freq (max)

60MHz

Operating Supply Voltage (typ)

3.3V

Operating Temp Range

0C to 70C

Package Type

TSSOP

Output Frequency Range

0.008 to 155.52MHz

Operating Supply Voltage (min)

3.15V

Operating Supply Voltage (max)

3.45V

Operating Temperature Classification

Commercial

Pin Count

Lead Free Status / Rohs Status

Not Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

CY26049ZC-36

Manufacturer:

CYPRESS/赛普拉斯

Quantity:

20 000

Current page: 1 of 8
Download datasheet (330Kb)

Features

■

Cypress Semiconductor Corporation

Document #: 38-07415 Rev. *E

Logic Block Diagram

Fully Integrated Phase-Locked Loop (PLL)

FailSafe™ Output

8 kHz Reference Clock

PLL Driven by a Crystal Oscillator that is Phase Aligned with

External Reference

Selectable Standard Communication Output Frequencies

Low Jitter, High Accuracy Outputs

3.3V Operation

16-Pin TSSOP Package

Commercial and Industrial Temperature Ranges

frequency select

Input reference

(typical 8 kHz)

FS[3:0]

ICLK

•

198 Champion Court

FAILSAFE

High=ICLK detected

SAFE

CONTROL

external pullable crystal

XIN

CONTROLLED

OSCILLATOR

(18.432 MHz)

CRYSTAL

Communications Clock Generator

DIGITAL

Functional Description

CY26049 is a FailSafe frequency synthesizer with a reference

clock input and three clock outputs. The device provides an

optimum solution for applications which require continuous

operation in case of primary clock failure. The continuous,

glitch-free operation is achieved by using a DCXO which serves

as a primary clock source. The FailSafe control circuit synchro-

nizes the DCXO with the reference as long as the reference is

within the pull range of the crystal.

In the event of a reference clock failure the DCXO maintains the

last frequency and phase information of the reference clock. The

unique feature of the CY26049-36 is that the DCXO is, in fact,

the primary clocking source. When the reference clock is

restored, the DCXO automatically resynchronizes to the

reference. The status of the reference clock input, as detected

by the CY26049-36, is reported by the SAFE pin.

In the buffer mode (FS3:FS0 = 1110 or 1111), the CY26049-36

can be used as a jitter attenuator. In this mode, extensive jitter

on the input clock is ‘filtered’, resulting in a low jitter output clock.

FailSafe™ PacketClock Global

XOUT

•

LOCKED

PHASE

LOOP

San Jose

DIVIDERS

OUTPUT

CA 95134-1709

CLK

CLK/2

Revised April 30, 2010

CY26049-36

•

408-943-2600

[+] Feedback

Related parts for CY26049ZC-36

CY26049ZC-36 Summary of contents

Page 1

... Logic Block Diagram Input reference (typical 8 kHz) ICLK FS[3:0] frequency select Cypress Semiconductor Corporation Document #: 38-07415 Rev. *E FailSafe™ PacketClock Global Communications Clock Generator Functional Description CY26049 is a FailSafe frequency synthesizer with a reference clock input and three clock outputs. The device provides an optimum solution for applications which require continuous operation in case of primary clock failure ...

Page 2

Pin Configuration Figure 1. CY26049-36 16-Pin TSSOP (Top View) Pin Definitions Pin Name Pin Number ICLK 1 Reference Input Clock; 8 kHz MHz Clock Output; 8 kHz or high impedance in buffer mode. FS1 ...

Page 3

Frequency Select Tables Table 1. CY26049-36 Frequency Select–Output Decoding Table–External Mode (MHz except as noted) ICLK FS3 FS2 8 kHz kHz kHz kHz kHz kHz ...

Page 4

Absolute Maximum Conditions Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Supply Voltage (V )........................................ –0.5 to +7. Input Voltage ....................................... –0. Storage Temperature (Non-Condensing).... –55°C to +125°C ...

Page 5

DC Electrical Specifications Parameter Description I Output High Current OH I Output Low Current OL V Input High Voltage IH V Input High Voltage IL I Input High Current IH I Input Low Current IL C Input Capacitance IN I ...

Page 6

Test Circuit Ordering Information Ordering Code Pb-Free CY26049ZXC-36 CY26049ZXC-36T CY26049ZXI-36 CY26049ZXI-36T Package Diagram 1 4.30[0.169] 4.50[0.177] 16 0.65[0.025] BSC. 0.19[0.007] 0.30[0.012] 0.05[0.002] 0.85[0.033] 0.15[0.006] 0.95[0.037] 4.90[0.193] 5.10[0.200] Document #: 38-07415 Rev. *E ICLK LOAD ...

Page 7

... Removed Selector Guide table Added units (MHz) to ICLK column of Table 2 Standardized parameter name capitalization in AC Electrical table Changed timing parameter name P_LOCK Added footnote for t and t P_LOCK FS_LOCK Remove part numbers CY26049ZC-36, CY26049ZC-36T, CY26049ZI-36 and CY26049ZI-36T Posting to external web. CY26049-36 Page [+] Feedback ...

Page 8

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

Related keywords

CY26049ZC-36 datasheet
CY26049ZC-36 data sheet
CY26049ZC-36 pdf datasheet
CY26049ZC-36 component
CY26049ZC-36 part
CY26049ZC-36 distributor
CY26049ZC-36 RoHS
CY26049ZC-36 datasheet download