MC68150FN40 IDT, Integrated Device Technology Inc, MC68150FN40 Datasheet

MC68150FN40

Manufacturer Part Number

MC68150FN40

Description

Manufacturer

IDT, Integrated Device Technology Inc

Datasheet

1.MC68150FN40.pdf (40 pages)

Specifications of MC68150FN40

Operating Temperature (max)

85C

Operating Temperature (min)

-40C

Package Type

PLCC

Pin Count

Mounting

Surface Mount

Lead Free Status / Rohs Status

Not Compliant

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IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc.

NOT RECOMMENDED FOR NEW DESIGNS

32-Bit to 32/16/8-Bit Dynamic

READ/WRITE Bus Sizer

SEMICONDUCTOR TECHNICAL DATA

MC68/LC/EC040 bus, or other 16- to 32-bit processors, to communicate

bi-directionally with 32-, 16-, or 8-bit peripherals and memories. It

dynamically recognizes the size of the selected peripheral/memory and

then writes or reads the appropriate data to or from that location. Systems

designed using the bus sizing feature built into the 68030 can now be

easily upgraded to the 68/EC040 by incorporating the MC68150. The

68150 comes in two speed grades: 25/33MHz and 40MHz. These

frequencies correspond to their 68040 counterparts. The two grades

should be ordered as the MC68150FN33 and MC68150FN40,

respectively.

from 8-bit ROM (EPROM, EEPROM, etc.) and communicating with 8-bit

SRAM’s for scratch pad memory storage during interrupt operations. The

dynamic property is necessary because the processor does not always

know the size of the peripheral it is accessing, as in the case of

communicating with a 16-bit VME bus. The MC68150 can also be used to

separate a 32-bit “Fast Bus” and an 8-, 16-, or 32-bit “Slow Bus”. (See

Figure 3)

Features

1. Overview of Chip Operation

PAL sees a TS signal from the ‘040 - and completed with a transfer acknowledge (TA) from the MC68150 to the MC68040. The

MC68150 has two distinct buses, the MPU bus and the peripheral bus. The MPU bus connects to the processor and includes the

transfer control signals (A1, A0, SIZ1, SIZ0, and R/W), the chip select (CS), the transfer acknowledge (TA) and the data bus

signals (D31-D0). The peripheral bus consists of the peripheral transfer control signals (SWE, UWE, LWE, DS, PA1, PA0), and

the peripheral transfer acknowledge signals (DSACK1, DSACK0) and the peripheral data bus (PD31-PD16).

data. These transceivers would be connected to the PD15-PD0 pins on the peripheral side and to the corresponding D15-D0 pins

on the MPU bus. The transfer direction is controlled with the R/W signal of the processor. The transceivers are enabled only when

making an access to a 32-bit port. The D15-D0 pins of the MPU bus on the MC68150 are always disabled until the port size is

known, to avoid bus contention when the port is 32-bits.

four separate transfers.

11/94

Motorola, Inc. 1994

Allows MC68/LC/EC040 or Other ‘040 Based Controllers or 68060 to

Also Allows Other RISC Processors to Communicate With 8-Bit and

Recognizes the Port (Peripheral) Size Dynamically

Generates Byte/Word Address to the Dynamic Port

Generates Byte WRITE Enable Signals For 16- and 8-bit Ports

Sends a Transfer Acknowledge Signal to the Processor When a

Synchronization of Data Transfer on Dynamic Port Allows Use of Any

Communicate With 8-Bit Memories and Any MC68XXX Peripheral

16-Bit Peripherals

Transfer Is Completed

Speed Peripheral

The MC68150 Dynamic Bus Sizer is designed to allow the 32-bit

Typical operations which call for bus sizing are booting up instructions

Each access through the MC68150 is started with a chip select (CS) assertion to the MC68150 - which is generated when a

If a 32-bit peripheral bus is used, then two additional transceivers (e.g. MC74F245) are required for the lower two bytes of the

An access refers to the complete transaction through the MC68150. On the peripheral bus, an access is split into one, two, or

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

REV 4

READ/WRITE

PLASTIC PACKAGE

(Pb-Free Package)

BUS SIZER

DYNAMIC

Plastic Package

CASE 779-02

Case 779-02

FN SUFFIX

EI SUFFIX

Order this document

DATA SHEET

MC68150 JULY 30, 2009

by MC68150/D

MC68150

Related parts for MC68150FN40

MC68150FN40 Summary of contents

Page 1

... MC68150. The 68150 comes in two speed grades: 25/33MHz and 40MHz. These frequencies correspond to their 68040 counterparts. The two grades should be ordered as the MC68150FN33 and MC68150FN40, respectively. Typical operations which call for bus sizing are booting up instructions from 8-bit ROM (EPROM, EEPROM, etc.) and communicating with 8-bit SRAM’ ...

Page 2

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 PIN DESCRIPTIONS Pin I/O Description BCLK I Bus clock — the main system clock (from MC88916) D31–D0 I/O Data bits on the 32-bit ‘040 bus PD31–PD16 I/O Peripheral data — data ...

Page 3

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Control Products — BR1334 Freescale Semiconductor, Inc. Figure 2. ...

Page 4

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Table 1. 68150 TRUTH TABLE (READ Mode) SIZ1 SIZ0 PA1 PA0 DSACK1 ...

Page 5

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Table 2. 68150 TRUTH TABLE (WRITE Mode) SIZ1 SIZ0 PA1 PA0 DSACK1 ...

Page 6

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 2. MC68040 BUS OPERATION An access is divided into multiple states. Each state represents half a clock period. All even states are defined when BCLK is High, all odd states are ...

Page 7

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer 2.2 Early Access Termination An access through an MC68150 can be terminated before completion by negating CS early. The CS negation is recognized on a rising edge of BCLK. The CS early ...

Page 8

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 2.4 Access Termination The final transfer on the peripheral side of the MC68150 occurs during DS5. The MC68150 access is normally terminated by the MC68150 asserting TA during DS6. Once the ...

Page 9

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer ignore the port size change on subsequent transfers or accept the subsequent transfers as a transfer of the original port size. If the MC68150 ignored the improper transfer, the DS is not ...

Page 10

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 MAXIMUM RATINGS* Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) OUT I DC Input Current, ...

Page 11

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer I versus FREQUENCY CC Frequency (MHz SPECIFICATIONS Symbol V Input HIGH Voltage IH V Input LOW Voltage IL Input Leakage Current I IN SIZ1, SIZ0, A1, ...

Page 12

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 AC SPECIFICATIONS (V = 5.0V 10 Spec Spec Specification/Characteristic Number 1 CS Asserted to BCLK Rising (Setup) 2 BCLK Rising to CS Negated (Hold) 3 A1, A0, SIZ1, SIZ0, ...

Page 13

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 6. MC68150 READ/WRITE Timing (Two Transfers Shown for Clarification) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, ...

Page 14

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 7. MC68150 READ/WRITE Timing; Asynchronous Operation Only for Processors Other Than 680X0 IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing Solutions Organization has been acquired by Integrated ...

Page 15

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 8. MC68150 READ/WRITE Timing Asynchronous Termination IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Control Products ...

Page 16

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 TIMING DIAGRAM EXAMPLES FOR ALL POSSIBLE TRANSFERS Figures 13 through 56 depict timing waveforms of all possible transfers, including all address combinations. Each pair of figures includes a read transfer and ...

Page 17

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 14. 32-Bit ‘040 WRITE to 8-Bit Peripheral Example IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc ...

Page 18

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 15. 32-Bit ‘040 READ From 16-Bit Peripheral Example Figure 16.32-Bit ‘040 WRITE to 16-Bit Peripheral Example IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing Solutions Organization has ...

Page 19

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 17. 32-Bit ‘040 READ From 32-Bit Peripheral Example Figure 18. 32-Bit ‘040 WRITE to 32-Bit Peripheral Example IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions ...

Page 20

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 19. 32-Bit to 32-Bit Transfer With a Wait State on the Peripheral Bus Figure 20. 32-Bit to 32-Bit Transfer With a One Cycle Delayed Start IDT™ 32-Bit to 32/16/8-Bit Dynamic ...

Page 21

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 21. 16-Bit ‘040 READ From 8-Bit Peripheral Example (PA1=0) Figure 22. 16-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1=0) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 22

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 23. 16-Bit ‘040 READ From 8-Bit Peripheral Example (PA1=1) Figure 24. 16-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1=1) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 23

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 25. 16 Bit ‘040 READ From 16-Bit Peripheral Example (PA1=0) Figure 26. 16-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1=0) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency ...

Page 24

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 27. 16-Bit ‘040 READ From 16-Bit Peripheral Example (PA1=1) LWE Figure 28. 16-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1=1) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale ...

Page 25

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 29. 16-Bit ‘040 READ From 32-Bit Peripheral Example (PA1=0) Figure 30. 16-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1=0) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 26

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 31. 16-Bit ‘040 READ From 32-Bit Peripheral Example (PA1=1) Figure 32. 16-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1=1) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 27

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 33. 8-Bit ‘040 READ From 8-Bit Peripheral Example (PA1,PA0=00) Figure 34. 8-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1,PA0=00) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 28

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 35. 8-Bit ‘040 READ From 8-Bit Peripheral Example (PA1,PA0=01) Figure 36. 8-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1,PA0=01) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 29

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 37. 8-Bit ‘040 READ From 8-Bit Peripheral Example (PA1,PA0=10) Figure 38. 8-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1,PA0=10) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 30

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 39. 8-Bit ‘040 READ From 8-Bit Peripheral Example (PA1,PA0=11) Figure 40. 8-Bit ‘040 WRITE to 8-Bit Peripheral Example (PA1,PA0=11) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 31

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 41. 8-Bit ‘040 READ From 16-Bit Peripheral Example (PA1,PA0=00) Figure 42. 8-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1,PA0=00) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 32

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 43. 8-Bit ‘040 READ From 16-Bit Peripheral Example (PA1,PA0=01) Figure 44. 8-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1,PA0=01) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 33

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 45. 8-Bit ‘040 READ From 16-Bit Peripheral Example (PA1,PA0=10) Figure 46. 8-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1,PA0=10) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 34

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 47. 8-Bit ‘040 READ From 16-Bit Peripheral Example (PA1,PA0=11) Figure 48. 8-Bit ‘040 WRITE to 16-Bit Peripheral Example (PA1,PA0=11) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 35

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 49. 8-Bit ‘040 READ From 32-Bit Peripheral Example (PA1,PA0=00) Figure 50. 8-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1,PA0=00) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 36

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 51. 8-Bit ‘040 READ From 32-Bit Peripheral Example (PA1,PA0=01) Figure 52. 8-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1,PA0=01) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 37

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer Figure 53. 8-Bit ‘040 READ From 32-Bit Peripheral Example (PA1,PA0=10) Figure 54. 8-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1,PA0=10) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale ...

Page 38

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MC68150 Figure 55. 8-Bit ‘040 READ From 32-Bit Peripheral Example (PA1,PA0=11) Figure 56. 8-Bit ‘040 WRITE to 32-Bit Peripheral Example (PA1,PA0=11) IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer MOTOROLA Freescale Timing ...

Page 39

MC68150 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer -N- - IDT™ 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer High Performance Frequency Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, ...

Page 40

MPC92459 MC68150 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 ...

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