HN58X2464FPI Renesas Electronics America, HN58X2464FPI Datasheet
HN58X2464FPI
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HN58X2464FPI Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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... MNOS memory technology and CMOS process and low voltage circuitry technology. They also have a 32-byte page programming function to make their write operation faster. Note: Renesas Technology’s serial EEPROM are authorized for using consumer applications such as cellular phone, camcorders, audio equipment. Therefore, please contact Renesas Technology’s sales office before using industrial applications such as automotive systems, embedded controllers, and meters ...
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... HN58X2408FPIE 16k bit (2048 × 8-bit) HN58X2416FPIE 32k bit (4096 × 8-bit) HN58X2432FPIE 64k bit (8192 × 8-bit) HN58X2464FPIE 8k bit (1024 × 8-bit) HN58X2408TIE 16k bit (2048 × 8-bit) HN58X2416TIE 32k bit (4096 × 8-bit) HN58X2432TIE 64k bit (8192 × 8-bit) ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Pin Description Pin name SCL SDA Block Diagram Control logic A0, A1, A2 SCL SDA Absolute Maximum Ratings Parameter Supply voltage relative Input ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I DC Operating Conditions Parameter Supply voltage Input high voltage Input low voltage Operating temperature (min): −1.0 V for pulse width ≤ 50 ns. Note − DC Characteristics ( +85 Parameter Symbol Min Input ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I − AC Characteristics ( +85 Test Conditions • Input pules levels: 0.2 × 0.8 × • Input rise and fall time: ≤ ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Timing Waveforms Bus Timing t F SCL t SU.STA t HD.STA SDA (in SDA (out) Write Cycle Timing SCL D0 in SDA Write data (Address (n)) Rev.5.00, Jan.14.2005, page 1/f SCL t t LOW ...
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... Pin Function Serial Clock (SCL) The SCL pin is used to control serial input/output data timing. The SCL input is used to positive edge clock data into EEPROM device and negative edge clock data out of each device. Maximum clock rate is 400 kHz. Serial Input/Output Data (SDA) The SDA pin is bidirectional for serial data transfer ...
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... SDA pin matches corresponding hard-wired device address pins A0 to A2, that one device can be activated. As for 8k to 16k EEPROM, whole or some device address pins don't need to be fixed since device address code provided from the SDA pin is used as memory address signal. ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Functional Description Start Condition A high-to-low transition of the SDA with the SCL high is needed in order to start read, write operation (See start condition and stop condition). Stop Condition A low-to-high transition of the SDA with the ...
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... EEPROM waits acknowledgment by keeping bus open. If the EEPROM receives zero as an acknowledge, it sends read data of next address. If the EEPROM receives acknowledgment "1" (no acknowledgment) and a following stop condition, it stops the read operation and enters a stand-by mode. If the EEPROM receives neither acknowledgment "0" nor a stop condition, the EEPROM keeps bus open without sending read data ...
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... A write operation is initiated if this bit is low and a read operation is initiated if this bit is high. Upon a compare of the device address word, the EEPROM enters the read or write operation after outputting the zero as an acknowledge. The EEPROM turns to a stand-by state if the device code is not “ ...
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... Write Operations Byte Write: A write operation requires an 8-bit device address word with R/W = “0”. Then the EEPROM sends acknowledgment "0" at the ninth clock cycle. After these, the 8kbit to 16kbit EEPROMs receive 8-bit memory address word, on the other hand the 32kbit and 64kbit EEPROMs receive 2 sequence 8-bit memory address words. Upon receipt of this memory address, the EEPROM outputs acknowledgment " ...
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... HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Page Write: The EEPROM is capable of the page write operation which allows any number of bytes bytes to be written in a single write cycle. The page write is the same sequence as the byte write except for inputting the more write data. The page write is initiated by a start condition, device address word, memory address(n) and write data(Dn) with every ninth bit acknowledgment ...
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... HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Acknowledge Polling: Acknowledge polling feature is used to show if the EEPROM internally-timed write cycle or not. This feature is initiated by the stop condition after inputting write data. This requires the 8-bit device address word following the start condition during a internally-timed write cycle. Acknowledge polling will operate when the R/W code = “ ...
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... EEPROM stops the read operation and is turned to a standby state. In case the EEPROM has accessed the last address of the last page at previous read operation, the current address will roll over and returns to zero address. In case the EEPROM has accessed the last address of the page at previous write operation, the current address will roll over within page addressing and returns to the first address in the same page ...
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... The EEPROM outputs the read data of the address which was defined in the dummy write operation. After receiving acknowledgment “1”(no acknowledgment) and a following stop condition, the EEPROM stops the random read operation and returns to a standby state ...
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... HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Sequential Read: Sequential reads are initiated by either a current address read or a random read. If the EEPROM receives acknowledgment “0” after 8-bit read data, the read address is incremented and the next 8-bit read data are coming out. This operation can be continued as long as the EEPROM receives acknowledgment “0”. The address will roll over and returns address zero if it reaches the last address of the last page ...
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... The data retention time is more than 10 years when a device is page-programmed 4 less than 10 cycles. Noise Suppression Time This EEPROM have a noise suppression function at SCL and SDA inputs, that cut noise of width less than 50 ns. Be careful not to allow noise of width more than 50 ns. Rev.5.00, Jan.14.2005, page during V on/off ...
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... HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I Package Dimensions HN58X2408FPIE/HN58X2416FPIE/HN58X2432FPIE/HN58X2464FPIE (FP-8DBV) 4.89 5.15 Max 0.69 Max 1.27 *0.40 ± 0.05 *Pd Plating Rev.5.00, Jan.14.2005, page 6.02 ± 0.18 1.06 0 ˚ – 8 ˚ + 0.289 0.60 – 0.194 0.10 0.25 M Package Code JEDEC JEITA Mass (reference value) Unit: mm FP-8DBV — ...
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HN58X2408I/HN58X2416I/HN58X2432I/HN58X2464I HN58X2408TIE/HN58X2416TIE/HN58X2432TIE/HN58X2464TIE (TTP-8DAV) 3.00 3.30 Max 0.65 *0.20 ± 0.05 0.13 M 0.805 Max 0.10 *Pd Plating Rev.5.00, Jan.14.2005, page 1.00 6.40 ± 0.20 0˚ – 8˚ 0.50 ± 0.10 Package Code TTP-8DAV ...
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... HN58X2464TIE, HN58X2416NIRE 19 Package Dimensions FP-8DB to FP-8DB, FP-8DBV TTP-8DA to TTP-8DA, TTP-8DAV TNP-8DA to TNP-8DA, FP-8DAV 5.00 Jan.14.2005 Deletion of package : SON (TNP-8DA, TNP-8DAV) 2 Ordering Information Deletion of HN58X2408FPI, HN58X2416FPI, HN58X2432FPI, HN58X2464FPI, HN58X2408TI, HN58X2416TI, HN58X2432TI, HN58X2464TI 19-20 Package Dimensions Deletion of FP-8DB, TTP-8DA “Temperature range” ...
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Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...