TC55V16256FT-15 Toshiba, TC55V16256FT-15 Datasheet

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TC55V16256FT-15

Manufacturer Part Number
TC55V16256FT-15
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC55V16256FT-15

Density
4Mb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
190mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256K
Lead Free Status / Rohs Status
Not Compliant
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,
and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide lower and upper
byte access. This device is well suited to cache memory applications where high-speed access and high-speed
storage are required. All inputs and outputs are directly LVTTL compatible. The TC55V16256J/FT is available in
plastic 44-pin SOJ and TSOP with 400mil width for high density surface assembly.
FEATURES
PIN ASSIGNMENT
GND
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
A15
A14
A13
A12
A16
WE
V
The TC55V16256J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 262,144
CE
A4
A3
A2
A1
A0
DD
Fast access time (the following are maximum values)
Low-power dissipation
(the following are maximum values)
44 PIN SOJ
Operation (max)
(TC55V16256J)
TC55V16256J/FT-12:12 ns
TC55V16256J/FT-15:15 ns
Standby:4 mA (both devices)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Cycle Time
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
220
UB
LB
12
A5
A6
A7
OE
I/O16
I/O15
I/O14
I/O13
GND
V
I/O12
I/O11
I/O10
I/O9
NU
A8
A9
A10
A11
A17
DD
(TOP VIEW)
190
15
GND
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
A15
A14
A13
A12
A16
WE
V
CE
44 PIN TSOP
A4
A3
A2
A1
A0
DD
160
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
140
(TC55V16256FT)
25
mA
ns
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
UB
LB
A5
A6
A7
OE
I/O16
I/O15
I/O14
I/O13
GND
V
I/O12
I/O11
I/O10
I/O9
NU
A8
A9
A10
A11
A17
DD
Single power supply voltage of 3.3 V ± 0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Data byte control using LB (I/O1 to I/O8) and
Package:
UB (I/O9 to I/O16)
SOJ44-P-400-1.27 (J)
TSOP II44-P-400-0.80 (FT)
PIN NAMES
I/O1 to I/O16 Data Inputs/Outputs
A0 to A17
LB , UB
GND
V
WE
CE
OE
NU
DD
TC55V16256J/FT-12,-15
Address Inputs
Chip Enable Input
Write Enable Input
Output Enable Input
Data Byte Control Inputs
Power (+3.3 V)
Ground
Not Usable (Input)
2002-01-07 1/11
(Weight: 1.64 g typ)
(Weight: 0.45 g typ)

Related parts for TC55V16256FT-15

TC55V16256FT-15 Summary of contents

Page 1

... I/O10 A10 21 24 A11 22 23 A17 (TC55V16256FT) TC55V16256J/FT-12,-15 (Weight: 1.64 g typ) (Weight: 0.45 g typ A17 Address Inputs I/O1 to I/O16 Data Inputs/Outputs CE Chip Enable Input WE Write Enable Input OE Output Enable Input Data Byte Control Inputs V Power (+3 GND Ground NU Not Usable (Input) ...

Page 2

BLOCK DIAGRAM A13 A14 A15 A17 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16 GENERATOR MAXIMUM RATINGS SYMBOL V Power Supply ...

Page 3

DC RECOMMENDED OPERATING CONDITIONS SYMBOL V Power Supply Voltage DD V Input High Voltage IH V Input Low Voltage IL *: −1.0 V with a pulse width of 20%・t + 1.0 V with a pulse width of 20%・t **: V ...

Page 4

OPERATING MODE MODE CE Read L Write L L Outputs Disable L Standby Don’t care Note: The NU pin must be left unconnected or tied to GND or a voltage level of less than 0.8 V. You ...

Page 5

AC CHARACTERISTICS READ CYCLE SYMBOL PARAMETER t Read Cycle Time RC t Address Access Time ACC t Chip Enable Access Time CO t Output Enable Access Time OE t Upper Byte, Lower ...

Page 6

TIMING DIAGRAMS (See Note 2) READ CYCLE Address Hi-Z OUT WRITE CYCLE CONTROLLED) Address OUT ACC ...

Page 7

WRITE CYCLE CONTROLLED) Address Hi-Z OUT WRITE CYCLE CONTROLLED) Address Hi-Z OUT D IN ...

Page 8

Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400 linear feet per minute. (2) WE remains HIGH for the Read Cycle. ( goes LOW coincident with or after WE goes LOW, the outputs will ...

Page 9

PACKAGE DIMENSIONS SOJ44-P-400-1.27 Weight: 1.64 g (typ) TC55V16256J/FT-12,-15 2002-01-07 9/11 ...

Page 10

PACKAGE DIMENSIONS Weight: 0.45 g (typ) TC55V16256J/FT-12,-15 2002-01-07 10/11 ...

Page 11

... TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property ...

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