IDT77252L155PG IDT, Integrated Device Technology Inc, IDT77252L155PG Datasheet

IDT77252L155PG

Manufacturer Part Number
IDT77252L155PG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT77252L155PG

Data Rate
155.52Mbps
Traffic Mngmt. Support
ABR/CBR/VBR/UBR
Utopia Level
Level 1
Bus Interface
PCI
Operating Supply Voltage (typ)
5V
Operating Temperature Classification
Commercial
Operating Temp Range
0C to 70C
Mounting
Surface Mount
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Pin Count
208
Lead Free Status / Rohs Status
Not Compliant

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2001 Integrated Device Technology, Inc.
Full-duplex Segmentation and Reassembly (SAR) at 155
Mbps "wire-speed" (310 Mbps aggregate speed)
Operates with ATM Networks up to 155.52 Mbps
Stand-alone Controller: Embedded Processor not required
Performs ATM Layer Protocol Functions
Supports AAL5, AAL3/4, AAL0 and Raw Cell Formats
Supports Constant Bit Rate (CBR), Variable Bit Rate (VBR),
and Unassigned Bit Rate (UBR), and Available Bit Rate
(ABR) Service Classes
Segments and Reassembles CS-PDUs into Host Memory
Up to 16K Open Transmit Connections
Up to 16K Simultaneous Receive Connections
ABR, VBR, UBR Selectable per VC Time-out
Automatic AAL5 Padding
Four Buffer Pools for Independent or Chained Reassembly
Supports Any Buffer Alignment Condition
Free Buffer Queues Mapped Into PCI Memory Space
Rx FIFO Size (Configurable to 1024 Kbytes)
Configurable Transmit FIFO Depth for Reduced Latency
Supports Big and Little Endian Data Transfers
Null Cell Disable Option During Transmit
NAND Test Mode
RM Cell Handling
UTOPIA Level 1 Interface to PHY
PCI BUS
33MHZ
32
155 Mbps ATM SAR Controller
With ABR Support for PCI-based
Networking Applications
16K x 32 to 512K x 32
EEPROM
SRAM
IDT77252
PCI ATM
ABR SAR
155Mbps
32
8
EPROM
1 of 17
80.0MHZ OSC.
Rx UTOPIA Bus
Tx UTOPIA Bus
Asynchronous Transfer Mode (ATM) networks. The ABR SAR performs
both the ATM Adaptation Layer (AAL) Segmentation and Reassembly
(SAR) function and the ATM layer protocol functions.
the ABR SAR uses host memory, rather than local memory, to reas-
semble Convergence Sublayer Protocol Data Units (CS-PDUs) from
ATM cell payloads received from the network. When transmitting, as CS-
PDUs become ready, they are queued in host memory and segmented
Utility Bus
The IDT77252 NICStAR
A Network Interface Card (NIC) or internetworking product based on
– SARWIN 2 Demonstration Program
– NDIS Driver
– Vx Works (3rd party)
– Linux (3rd party)
Utility Bus Interface for PHY Management
Serial EEPROM Interface
EPROM Interface
PCI 2.1 Compliant
UNI 3.1, TM 4.0 Compliant
Meets PCI Bus Power Management and Interface
Specification Revision 1.1
Pin Compatible with IDT 77211 SAR
Commercial and Industrial Temperature Ranges
208-Lead PQFP Package (28 x 28mm)
Software Drivers:
8
8
8
PHY
is a member of IDT's family of products for
155Mbps
4057 drw 01
2
2
March 26, 2001
IDT77252
DSC 4057/8

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IDT77252L155PG Summary of contents

Page 1

Mbps ATM SAR Controller With ABR Support for PCI-based Networking Applications Full-duplex Segmentation and Reassembly (SAR) at 155 Mbps "wire-speed" (310 Mbps aggregate speed) Operates with ATM Networks up to 155.52 Mbps Stand-alone Controller: Embedded Processor not required Performs ...

Page 2

IDT77252 by the ABR SAR into ATM cell payloads. From this, the ABR SAR then creates complete 53-byte ATM cells which are sent through the network. The ABR SAR's on-chip PCI bus master interface provides efficient, low latency DMA transfers ...

Page 3

IDT77252 1 0.02 ±0.004 (0.5 ±0.1) 0.008 ±0.004 (0.2 ±0.1) 52 0.013 ±0.002 (0.33 ±0.06)    AD(31) 3 AD(30) 4 AD(29) 5 AD(28) 6 AD(27) 7 AD(26) 8 GND 9 GND 10 AD(25) 11 ...

Page 4

IDT77252    14 AD(23) 15 AD(22) 16 GND 17 GND 18 AD(21 AD(20) 21 AD(19) 22 AD(18) 23 AD(17) 24 AD(16) 25 GND 26 GND 27 C/BE( Frame 30 IRDY ...

Page 5

IDT77252    GND 55 C/BE(0) 56 AD( AD(6) 59 AD(5) 60 AD(4) 61 GND 62 SR_A17 63 AD(3) 64 AD(2) 65 AD(1) 66 AD(0) 67 GND 68 SR_A15 69 SR_WE ...

Page 6

IDT77252    92 SR_I/O(0) 93 SR_I/O(1) 94 SR_I/O(2) 95 SR_I/O(3) 96 SR_I/O(4) 97 SR_I/O(5) 98 GND 99 SR_I/O(6) 100 SR_I/O(7) 101 SR_I/O(8) 102 SR_I/O(9) 103 SR_I/O(10) 104 GND 105 V CC 106 SR_I/O(11) 107 SR_I/O(12) 108 SR_I/O(13) 109 ...

Page 7

IDT77252    131 E_CE 132 V CC 133 EECS 134 EESCLK 135 EEDI 136 EEDO 137 GND 138 SAR_CLK 139 V CC 140 UTL_AD(0) 141 UTL_AD(1) 142 UTL_AD(2) 143 GND 144 UTL_AD(3) 145 V CC 146 UTL_AD(4) 147 ...

Page 8

IDT77252    170 GND 171 TxSOC 172 TxEnb 173 TxFull/TxCLAV 174 TxCLK 175 GND 176 RxData(0) 177 RxData(1) 178 RxData(2) 179 RxData(3) 180 GND 181 RxData(4) 182 RxData(5) 183 RxData(6) 184 RxData(7) 185 RxSOC 186 RxEnb 187 RxEmpty/RxCLAV ...

Page 9

IDT77252  OUT Tstg  titr titf  SAR_CLK PHY_CLK PCI_CLK     C Input Capacitance IN C Output Capacitance OUT Cbid Bi-Directional Capacitance Cinpci PCI Bus ...

Page 10

IDT77252     Iol Low-level TTL output current: SR_A(18-0) Ioh High-level TTL output current: SR_A(18-0) Iol Low-level TTL output current: RxEnb, RxClk, TxSOC, TxData (7-0), TxEnb, TxParity, TxClk, WE#, OE#, CS#, SR_D31-0 Ioh High-level TTL output current: RxEnb#, RxClk, TxSoc, ...

Page 11

IDT77252 !    !  CLK_OUT 198 AD[12] RST 203 AD[11] CLK 204 AD[10] GNT 205 AD[9] REQ 206 AD[8] AD[31] 2 C/BE[0] AD[30] 3 AD[7] AD[29] 4 AD[6] AD[28] 5 AD[5] AD[27] 6 AD[4] AD[26] 7 AD[3] ...

Page 12

IDT77252  tval CLK to Output Signal Valid Delay: AD31-0, C/BE3-0, PAR, FRAME, IRDY, DEVSEL, TRDY, STOP, PERR, SERR tval(ptp) CLK to Output Signal Valid Delay: REQ ton Float to Signal Active Delay: AD31-0, C/BE3-0, PAR, FRAME, IRDY, DEVSEL, TRDY, ...

Page 13

IDT77252  tr1 UTL_ALE Pulse Width tr2 UTL_CS0/1 Output Valid to UTL_ALE falling edge tr3 UTL_RD Output Valid from UTL_ALE falling edge tr4 UTL_CS0/1 Pulse Width tr5 UTL_RD Pulse Width tr6 UTL_ALE falling edge to UTL_RD rising edge tr7 UTL_AD(7-0) ...

Page 14

IDT77252 ton (I) PCI_CLK (O) AD31-0 ( 3-0 (O) FRAME (O) IRDY (I) DEVSEL (I) TRDY (O) REQ (O) PAR GNT (I) Figure 1 The ABR SAR as a PCI Master (illustrates a 4-word write by the ABR ...

Page 15

IDT77252 (I) PHY_Clk (O) TxClk,RxClk (O) TxData 7-0 (O) TxSOC (O) TxEnb (O) TxParity (I) Txfull / TxCLAV (O) RxEnb (I) RxData 7-0 (I) RxSOC (I) RxEmpty/ RxCLAV (O) UTL_ALE (O) UTL_CS0/1 (O) UTL_WR (I/O) UTL_AD(7-0) UTL_ALE UTL_CS0/1 UTL_RD UTL_AD7-0 ...

Page 16

IDT77252 SR_A(18-0) SR_CS SR_WE SR_I/O(31-0) SR_A(18-0) SR_CS SR_OE SR_I/O(31-0) SR-A (18-0) E_CE SR_I/O(7-0) SAR_CLK EECS EECLK EEDO EEDI Several software vendors have written IDT77252 software drivers for various operating systems. Please contact your local IDT sales representa- tive for a ...

Page 17

IDT77252 NIC Reference and Evaluation adapters are available in several form factors. Bill of Materials (BOM) and schematics are available upon request for each of the NIC adapters. A list of current NIC adapter offerings can be found at www.idt.com. ...

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