M69030 Asiliant Technologies, M69030 Datasheet - Page 165
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
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CHIPS
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GR06
read/write at I/O address 3CFh with index at address 3CEh set to 06h
shared by both pipelines A and B (except bit 0, which is shadowed for pipelines A and B)
7-4
3-2
1
0
`efmp
A
&
B
Reserved
Memory Map Mode
Chain Odd/Even
Graphics/Text Mode (shadowed)
69030 Databook
7
Miscellaneous Register
These 2 bits control the mapping of the frame buffer into the CPU address space as follows:
Note: This function is both in standard VGA modes and in extended modes that do not
provide linear frame buffer access.
This bit provides the ability to alter the interpretation of address bit A0, so that it may be
used in selecting between the odd-numbered memory planes (planes 1 and 3) and the
even-numbered memory planes (planes 0 and 2).
0: A0 functions normally.
1: A0 is switched with a high order address bit, in terms of how it is used in address
decoding. The result is that A0 is used to determine which memory plane is being
accessed:
0: Selects text mode.
1: Selects graphics mode.
Bits
3 2
0 0
0 1
1 0
1 1
6
A0 = 0: planes 0 and 2
A0 = 1: planes 1 and 3
Reserved
Frame Buffer Address Range
5
A0000h - BFFFFh
A0000h - AFFFFh
B0000h - B7FFFh
B8000h - BFFFFh
Graphics Controller Registers
4
Memory Map Mode
3
2
Chain Odd/
Revision 1.3 11/24/99
Even
1
Text Mode
Graphics /
0
11-9
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