M69030 Asiliant Technologies, M69030 Datasheet - Page 221
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
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XRAF
read/write at I/O address 3D7h with index at I/O address 3D6h set to AFh
shared by both pipelines A and B
7
6-3
2-0
XRC0
read/write at I/O address 3D7h with index at I/O address 3D6h set to C0h
shared by both pipelines A and B
Note: All four of the registers used in specifying the loop parameters for dot clock 0 (XRC0 - XRC3) must
be written, and in order from XRC0 to XRC3, before the hardware will update the synthesizer’s settings.
This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output as new
values are being written to these registers.
7-0
`efmp
A
&
B
A
&
B
Y-Position
Sign Bit
Cursor 2 Y-Position Sign Bit
Reserved
Cursor 2 Y-Position Magnitude Bits 10-8
Dot Clock 0 VCO M-Divisor
69030 Databook
(0)
7
7
Dot Clock 0 VCO M-Divisor Register
Cursor 2 Y-Position High Register
This bit provides the sign bit of a signed 12-bit value that specifies the vertical position of
cursor 2. The magnitude bits are provided by the Cursor 2 Y-Position Low Register (XRAE)
and bits 2-0 of this register.
These bits always return the value of 0 when read.
These three bits provide the three most significant magnitude bits of a signed 12-bit value
that specifies the vertical position of cursor 2. The eight least significant magnitude bits of
this value are provided by bits 7-0 of the Cursor 2 Y-Position Low Register (XRAE). The
sign bit is provided by bit 7 of this register.
This register provides the M-divisor, one of the loop parameters used in controlling the
frequency of the output of the synthesizer used to generate dot clock 0.
A series of calculations are used to derive this value and the values for the other loop
parameters given a desired output frequency and a series of constraints placed on different
components within the synthesizer used to generate dot clock 0. See appendix B for a
detailed description of the process used to derive the loop parameter values.
6
6
5
5
Reserved
(000:0)
Dot Clock 0 VCO M-Divisor
Extension Registers
4
4
3
3
Cursor 2 Y-Position Magnitude
2
2
Bits 10-8
Revision 1.3 11/24/99
(000)
1
1
0
0
14-41
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