TE28F640J3D75 Intel, TE28F640J3D75 Datasheet - Page 25

• Manufacturer Part Number: TE28F640J3D75
• Manufacturer: Intel

Specifications of TE28F640J3D75

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 75ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Sync/async: Asynchronous
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4Mword
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

Numonyx™ Embedded Flash Memory (J3 v. D)
Figure 11: Single Word Asynchronous Read Waveform
Notes:
1.
2.
Figure 12: 4-Word Asynchronous Page Mode Read Waveform
Note:
November 2007
308551-05
A[MAX:3] [A]
Address [A]
Data [D/Q]
BYTE#[F]
D[15:0] [Q]
WE# [W]
OE# [G]
A[2:1] [A]
RP# [P]
CEx [E]
WE# [W]
OE# [G]
RP# [P]
CEx [E]
CE
CE0, CE1, or CE2 that disables the device.
When reading the flash array a faster t
query reads, or device identifier reads).
CE
CE0, CE1, or CE2 that disables the device.
X
X
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
R6
R11
R7
R6
R5
R7
R5
R2
R2
R3
R16
R3
R4
R4
R12
00
GLQV
(R16) applies. For non-array reads, R4 applies (i.e., Status Register reads,
1
R1
R1
R10
R1
R1
R13
R15
01
2
10
X
X
high is defined at the first edge of
high is defined at the first edge of
3
11
R10
R8
R9
4
R10
R9
R8
Datasheet
25