DSP56301PW80B1 Freescale Semiconductor, DSP56301PW80B1 Datasheet - Page 16

• Manufacturer Part Number: DSP56301PW80B1
• Manufacturer: Freescale Semiconductor

Specifications of DSP56301PW80B1

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 80MHz
• Mips: 80
• Device Input Clock Speed: 80MHz
• Ram Size: 24KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Signals/Connections
1-12
HTRDY
HDBEN
PB20
HIRDY
HDBDR
PB21
HDEVSEL
HSAK
PB22
HLOCK
HBS
PB23
Signal Name
Input/
Output
Output
Input or Output
Input/
Output
Output
Input or Output
Input/
Output
Output
Input or Output
Input
Input
Input or Output
Type
Tri-stated
Tri-stated
Tri-stated
Tri-stated
State During
Table 1-11.
Reset
DSP56301 Technical Data, Rev. 10
Host Target Ready
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Target Ready signal.
Host Data Bus Enable
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Bus Enable signal.
Port B 20
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
Host Initiator Ready
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Initiator Ready signal.
Host Data Bus Direction
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Bus Direction signal.
Port B 21
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
Host Device Select
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Device Select signal.
Host Select Acknowledge
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Select Acknowledge signal.
Port B 22
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
Host Lock
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Lock signal.
Host Bus Strobe
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Bus Strobe Schmitt-trigger signal.
Port B 23
When the HI32 is configured as GPIO through the DCTR, this signal is
individually programmed through the HI32 DIRH.
This input is 5 V tolerant.
Host Interface (Continued)
Signal Description
Freescale Semiconductor