PXAH40KFBE NXP Semiconductors, PXAH40KFBE Datasheet - Page 13

PXAH40KFBE

Manufacturer Part Number
PXAH40KFBE
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PXAH40KFBE

Cpu Family
XA
Device Core
80C51
Device Core Size
16b
Frequency (max)
30MHz
Interface Type
USART
Program Memory Type
ROMLess
Program Memory Size
Not Required
# I/os (max)
32
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.97V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant

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Philips Semiconductors
Table 3. Memory Mapped Registers (MMR)
1999 Sep 24
USART0 Write Register 0
USART0 Write Register 1
USART0 Write Register 2
USART0 Write Register 3
USART0 Write Register 4
USART0 Write Register 5
USART0 Write Register 6 (XA-H4 only)
USART0 Write Register 7
USART0 Write Register 8
USART0 Write Register 9
USART0 Write Register 10
USART0 Write Register 11
USART0 Write Register 12
USART0 Write Register 13
USART0 Write Register 14
USART0 Write Register 15
USART0 Write Register 16
USART0 Write Register 17
USART0 Read Register 0
USART0 Read Register 1
USART0 Read Register 3
see WR16 and 17
USART0 Read Register 6
USART0 Read Register 7
USART0 Read Register 8
USART0 Read Register 10
USART1 Write Register 0
USART1 Write Register 1
USART1 Write Register 2
USART1 Write Register 3
USART1 Write Register 4
USART1 Write Register 5
USART1 Write Register 6
USART1 Write Register 7
USART1 Write Register 8
USART1 Write Register 9
USART1 Write Register 10
USART1 Write Register 11
USART1 Write Register 12
USART1 Write Register 13
Single-chip 16-bit microcontroller
Reserved – do not write
Reserved
Reserved
MMR Name
or Read Only
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
Size
USART0 Registers
USART1 Registers
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
828–82Ah
836-83Eh
Address
Offset
80Ah
80Ch
80Eh
81Ah
81Ch
81Eh
82Ah
82Ch
82Eh
84Ah
84Ch
84Eh
85Ah
800h
802h
804h
806h
808h
810h
812h
814h
816h
818h
828h
820h
822h
824h
826h
830h
832h
834h
840h
842h
844h
846h
848h
850h
852h
854h
856h
858h
13
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx miscellaneous parameters & mode
Tx parameter and control
HDLC/SDLC address field or asynch Match Character 0
HDLC/SDLC flag or Match Character 1
Transmit Data Buffer
Master Interrupt control
Miscellaneous Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
Upper Byte of Baud rate time constant
Miscellaneous Control bits
External/Status interrupt control
Match Character 2 (WR16)
Match Character 3 (WR17)
Tx/Rx buffer and external status
Receive condition status/residue code
Interrupt Pending Bits
see WR16 and 17 above
SDLC byte count low register
SDLC byte count high and FIFO status
Receive Buffer
Loop/clock status
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx miscellaneous parameters & mode
Tx parameter and control
HDLC/SDLC address field or Match Character 0
HDLC/SDLC flag or async Match Character 1
Transmit Data Buffer
Master Interrupt control
Miscellaneous Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
Upper Byte of Baud rate time constant
Description
Preliminary specification
XA-H4
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
Reset
Value

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