ISP1761BE STEricsson, ISP1761BE Datasheet - Page 97

• Manufacturer Part Number: ISP1761BE
• Manufacturer: STEricsson

Specifications of ISP1761BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 90.
[1]
Table 92.
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
OTG Interrupt Enable Fall register (address set: 0380h, clear: 0382h) bit allocation
OTG Interrupt Enable Rise register (address set: 0384h, clear: 0386h) bit allocation
9.5.3.3 OTG Interrupt Enable Fall register
9.5.3.4 OTG Interrupt Enable Rise register
B_SESS_
R/S/C
R/S/C
R/S/C
END
15
15
0
7
0
0
Table 90
HIGH-to-LOW.
Table 91.
This register (see
LOW-to-HIGH.
Bit
15 to 9
8
7
6 to 5
4
3
2
1
0
R/S/C
R/S/C
R/S/C
14
14
0
6
0
0
shows the bit allocation of this register that enables interrupts on transition from
reserved
Symbol
-
B_SE0_SRP
B_SESS_END
-
RMT_CONN
ID
-
A_B_SESS_VLD
VBUS_VLD
OTG Interrupt Enable Fall register (address set: 0380h, clear: 0382h) bit
description
R/S/C
R/S/C
R/S/C
Table 92
13
13
0
5
0
0
reserved
Rev. 05 — 13 March 2008
for bit allocation) enables interrupts on transition from
reserved
[1]
CONN
RMT_
R/S/C
R/S/C
R/S/C
Description
reserved for future use
IRQ asserted when the bus exits from at least 2 ms of the SE0
state
IRQ asserted when V
reserved
IRQ asserted on RMT_CONN removal
IRQ asserted on the ID pin transition from HIGH to LOW
reserved
IRQ asserted on removing A-session valid for the A-device or
B-session valid for the B-device condition
IRQ asserted on the falling edge of V
12
12
0
4
0
0
[1]
R/S/C
R/S/C
R/S/C
11
11
ID
0
3
0
0
BUS
> 0.8 V
reserved
R/S/C
R/S/C
R/S/C
10
10
0
2
0
0
Hi-Speed USB OTG controller
BUS
OTG_TMR_
A_B_SESS
TIMEOUT
R/S/C
R/S/C
R/S/C
_VLD
9
0
1
0
9
0
© NXP B.V. 2008. All rights reserved.
ISP1761
VBUS_VLD
B_SE0_
B_SE0_
R/S/C
R/S/C
R/S/C
SRP
SRP
96 of 163
8
0
0
0
8
0