CY2DL818ZI Cypress Semiconductor Corp, CY2DL818ZI Datasheet

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CY2DL818ZI

Manufacturer Part Number
CY2DL818ZI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY2DL818ZI

Lead Free Status / Rohs Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2DL818ZI
Manufacturer:
SKYWORKS
Quantity:
36
Cypress Semiconductor Corporation
Document #: 38-07058 Rev. *B
Features
• Low voltage operation
• V
• 1:8 fanout
• Single-input-configurable for LVDS, LVPECL, or LVTTL
• 8 pair of LVDS Outputs
• Drives either a 50-ohm or 100-ohm load (selectable)
• Low input capacitance
• Low output skew
• Low propagation delay
• Typical (tpd < 4 ns)
• Packages available include: TSSOP
• Does not exceed Bellcore 802.3 standards
• Operation at => 350 MHz – 700 Mbps
Block Diagram
INPUT A
INPUT B
InConfig
DD
(LVPECL / LVDS / LVTTL)
= 3.3V
CNTRL
INPUT
10
6
11
7
OUTPUT
33
32
28
27
31
30
22
21
37
36
35
34
26
25
24
23
(LVDS)
3901 North First Street
Q5A
Q3A
Q3B
Q4A
Q4B
Q5B
Q6A
Q6B
Q7A
Q7B
Q8A
Q8B
Q1A
Q1B
Q2A
Q2B
Description
This Cypress series of network circuits is produced using
advanced 0.35-micron CMOS technology, achieving the
industry’s fastest logic.
The Cypress CY2DL818 fanout buffer features a single LVDS
or a single-ended LVTTL-compatible input and eight LVDS
output pairs.
Designed for data communications clock management appli-
cations, the large fanout from a single input reduces loading
on the input clock. The Cypress CY2DL818 is ideal for both
level translations from single-ended to LVDS and/or for the
distribution of LVDS-based clock signals.
The Cypress CY2DL818 has configurable input and output
functions. The input can be selectable for LVCMOS/LVTTL,
LVPECL, or LVDS signals, while the output drivers support
standard and high-drive LVDS. Drive either a 50-ohm or
100-ohm line with a single part number/device.
Pin Configuration
San Jose
1:8 Clock Fanout Buffer
INPUT B
INPUT A
InConfig
CNTRL
GND
GND
GND
GND
GND
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38 pin TSSOP
CA 95134
Revised December 15, 2002
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
Q3B
Q4B
Q5A
Q8A
GND
Q1A
Q1B
Q2A
Q2B
Q3A
Q4A
VDD
Q5B
Q6A
Q6B
Q7A
Q7B
Q8B
GND
CY2DL818
408-943-2600

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CY2DL818ZI Summary of contents

Page 1

... INPUT A 11 INPUT B 6 InConfig 7 CNTRL Cypress Semiconductor Corporation Document #: 38-07058 Rev. *B Description This Cypress series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DL818 fanout buffer features a single LVDS or a single-ended LVTTL-compatible input and eight LVDS output pairs ...

Page 2

Pin Description Pin Number Pin Name 1, 9,12 18,19,20,38 2,3,4,5, 14,15,16,17,29 10,11 Input A, Input B(#) 37, 36,35,34, Q1A, Q1B, Q2A, Q2B, 33,32,31, 30, Q3A, Q3B, Q4A, Q4B, 28,27,26,25, Q5A, Q5B, Q6A, Q6B, 24,23,22,21 Q7A, ...

Page 3

Maximum Ratings Storage Temperature: ................................– 150 C Ambient Temperature:................................... – +85 C Supply Voltage to Ground Potential (Inputs and V only)....................................... –0. Electrical Characteristics: 3.3V–LVDS Input Parameter Description V Magnitude ...

Page 4

AC Switching Characteristics @ 3.3 V Parameter t Propagation Delay – Low to High PLH t Propagation Delay – High to Low PHL t Output Skew: Skew between outputs of the same SK(0) package (in phase) t Pulse Skew: Skew ...

Page 5

A Pulse Generator B V1A V1B V0Y V0Z Figure 2. Differential Receiver to Driver Propagation Delay and Driver Transition Time Figure 3. Test ...

Page 6

Pulse Generator V I(A) V I(B) Figure 4. Test Circuit and Voltage Definitions for the Differential Output Signal Figure 7. CNTRL Control for Standard or High-drive Drivers Notes: 8. See Function Control of the TTL ...

Page 7

... Ordering Information Part Number CY2DL818ZI CY2DL818ZIT CY2DL818ZC CY2DL818ZCT Package Drawing and Dimensions All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07058 Rev. *B © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product ...

Page 8

Document Title: CY2DL818 1:8 Clock Fanout Buffer Document Number: 38-07058 Rev. ECN No. Issue Date ** 115151 05/30/02 *A 117611 09/16/02 *B 122745 12/15/02 Document #: 38-07058 Rev. *B Orig. of Change EHX New Data Sheet RGL Changed the figure ...

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