E-STLC2416 STMicroelectronics, E-STLC2416 Datasheet
E-STLC2416
Specifications of E-STLC2416
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E-STLC2416 Summary of contents
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... Company name - STMicroelectronics NV is replaced with ST-NXP Wireless. ● Copyright - the copyright notice at the bottom of the last page “© STMicroelectronics 200x - All rights reserved”, shall now read: “© ST-NXP Wireless 200x - All rights reserved”. ● Web site - http://www.st.com ● ...
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... Separate control for external power amplifier (PA) for class1 power support. Software support Description The E-STLC2416 from STMicroelectronics is a Bluetooth™ baseband controller with integrated 4 Mbit flash memory. Together with a Bluetooth™ Radio this product offers a compact and complete solution for short-range wireless connectivity. It incorporates all the lower layer functions of the Bluetooth™ ...
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... V1.2 detailed functionality - Extended SCO . . . . . . . . . . . . . . . . . . . . . . . 21 6.7 V1.2 detailed functionality - Adaptive frequency hopping . . . . . . . . . . . . . 21 6.8 V1.2 detailed functionality - Faster connection . . . . . . . . . . . . . . . . . . . . . 22 6.9 V1.2 detailed functionality - Quality of service . . . . . . . . . . . . . . . . . . . . . 22 2/37 Specifications for 3.3V I/ Specifications for 1.8V I/ Baseband 1.1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Baseband 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Flash signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Slow clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 E-STLC2416 ...
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... E-STLC2416 6.10 Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.10.1 6.10.2 6.10.3 6.10.4 6.11 SW initiated low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.12 Bluetooth - WLAN coexistence in collocated scenario . . . . . . . . . . . . . . . 24 6.12.1 6.12.2 6.12.3 6.12.4 6.12.5 7 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.1 UART Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.2 Synchronous serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.2.1 7.2.2 7.3 I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7.4 USB interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 ...
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... Overview 1 Overview The E-STLC2416 from STMicroelectronics is a Bluetooth™ baseband controller with integrated 4 Mbit flash memory. Together with a Bluetooth™ Radio this product offers a compact and complete solution for short-range wireless connectivity. It incorporates all the lower layer functions of the Bluetooth™ protocol. ...
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... E-STLC2416 Standard BlueRF bus interface QoS flush Clock support – System clock input at 13 and 26 MHz – LPO clock input at 3.2 and 32 kHz ARM7TDMI 32-bit CPU Memory organization – Integrated 4 Mbit flash – 64KByte on-chip RAM – 4KByte on-chip boot ROM ...
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... Supply voltage flash DDF V Supply voltage digital I/O DDIO V Supply voltage flash I/O (V DDQ T Operating ambient temperature amb 6/37 Conditions Conditions Min 1.55 1.55 2.7 ≤ 1.55 DDQ DDF -40 E-STLC2416 Min Max Unit V 0.5 2 – V 0.5 2 – – 0.5 2 – ...
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... E-STLC2416 2.3 I/O specifications Depending on the interface, the I/O voltage is typical 1.8V (interface to the flash memory) or typical 3.3V (all the other interfaces). These I/Os comply with the EIA/JEDEC standard JESD8-B. 2.3.1 Specifications for 3.3V I/Os ) Table 3. LVTTL DC input specification (3V<V Symbol ...
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... Quick reference data 2.4 Current consumption Table 7. Typical power consumption of the E-STLC2416 (VDD = VDD Flash = PLLVDD = 1.8V, VDDIO = 3.3V) E-STLC2416 state Standby (no low power mode) Standby (low power mode enabled) ACL connection (no transmission) ACL connection (data transmission) SCO connection (no codec connected) ...
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... E-STLC2416 3 Block diagram and electrical schematics Figure 1. Block diagram and electrical schematic V DD 100nF V DDIO 100nF V DDIO 100nF RF BUS (*) 22pF LPOCLKP Y2 32KHz 22pF LPOCLKN VDDPLL V DD 100nF (*) If a low-power clock is available, it can be connected to the LPOCLKP pin in stead of using a crystal (**) For device testing only (should not be connected in the application. ...
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... Pin description and assignment Table 8 shows the pin list of the E-STLC2416. There are 91 functional pins of which 25 are used for device testing only (should not be connected in the application) and 24 supply pins. The column “PU/PD” shows the pads implementing an internal weak pull-up/down, to fix value if the pin is left open ...
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... E-STLC2416 Table 8. E-STLC2416 pin list Name Pin # Clock and test pins xin B18 System clock nreset A18 Reset nrp A17 Flash reset nwp H3 Flash Write Protect sys_clk_req C18 System clock request lpo_clk_p V9 Low power oscillator + / Slow clock input lpo_clk_n V10 Low power oscillator - ...
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... Pinout Table 8. E-STLC2416 pin list (continued) Name Pin # uart2_i1 A7 Uart2 modem input uart2_i2 C8 Uart2 modem input uart2_io1 C6 Uart2 modem input/output uart2_io2 C5 Uart2 modem input/output uart2_txd A8 Uart2 transmit data uart2_rxd A9 Uart2 receive data I2C interface i2c_dat A14 I2C data pin i2c_clk A13 ...
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... E-STLC2416 Table 8. E-STLC2416 pin list (continued) Name Pin # gpio8 V18 Gpio port 8 gpio9 U18 Gpio port 9 gpio10 R18 Gpio port 10 gpio11 T18 Gpio port 11 gpio12 P18 Gpio port 12 gpio13 T16 Gpio port 13 gpio14 P16 Gpio port 14 gpio15 R16 Gpio port 15 JTAG interface ...
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... J18 Packet ON ant_sw H16 Antenna switch 1. Should be strapped to vssio if not used. 2. Should be strapped to vddio if not used. 3. Must have a 10 kohm pull-up. Table 9. E-STLC2416 pin list - Power supply Name Pin# vsspll T15 PLL ground vddpll V15 1.8V supply for PLL vdd A4 1 ...
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... E-STLC2416 Table 9. E-STLC2416 pin list - Power supply (continued) Name Pin# vss T9 Digital ground vssf L3 Digital ground Flash vssio C12 I/O's ground vssio C4 I/O's ground vssio T14 I/O's ground vssio D16 I/O's ground Table 10. E-STLC2416 pin list (continued) Name Pin # To be connected together on the PCB ...
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... Pinout Table 10. E-STLC2416 pin list (continued) Name Pin # data6 T5 External data bit 6 data7 T6 External data bit 7 data8 T7 External data bit 8 data9 V2 External data bit 9 data10 V3 External data bit 10 data11 V4 External data bit 11 data12 V5 External data bit 12 data13 V6 External data bit 13 data14 ...
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... E-STLC2416 5 Functional description 5.1 Baseband WLAN coexistence. See also scenario. 5.1.1 Baseband 1.1 features The baseband is based on Ericsson Technology Licensing Baseband Core (EBC) and it is compliant with the Bluetooth specification 1.1: – Point to multipoint ( slaves) – Asynchronous Connection Less (ACL) link support giving data rates up to 721 kbps – ...
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... Exiting reset mode the device enters read array 18/37 M28R400CT Top Boot Block Addresses 3FFFF 4 KWords 3F000 Total KWord Blocks 38FFF 4 KWords 38000 37FFF 32 KWords 30000 Total KWord Blocks 0FFFF 32 KWords 08000 07FFF 32 KWords 00000 E-STLC2416 ...
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... E-STLC2416 mode, but a negative transition of Chip Enable or a change of the address is required to ensure valid data outputs. Vdd Supply Voltage (vddf) Vdd provides the power supply to the internal core of the flash memory device the main power supply for all operations (Read, Program and Erase) ...
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... When boot pin is set to `1` (connected to VDD), the E-STLC2416 boots on its flash UART download boot from ROM. When boot pin is set to `0` (connected to GND), the E-STLC2416 boots on its internal ROM (needed to download the new firmware in the flash). When booting on the internal ROM, the E-STLC2416 will monitor the UART interface for approximately 1 ...
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... E-STLC2416 6.4 Master reset When the device's reset is held active (nreset is low), uart1_txd and uart2_txd are set to input state. When the nreset returns high, the device starts to boot. Note: The device should be held in active reset for minimum 20ms in order to guarantee a complete reset of the device. ...
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... Simple latency control: allows the host to set the poll interval. Provides enough support for HID devices mixed with other traffic in the piconet. 22/37 E-STLC2416 AFH(79) WLAN used frequency t AFH(19<N<79) WLAN used frequency ...
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... Deep Sleep Mode outside the receiver activity. The selection between Sleep Mode and Deep Sleep Mode depend on the UART activity like in SNIFF or PARK. 6.10.3 No connection If the Host places the UART in low power and there is no activity, then the E-STLC2416 can be placed in Deep Sleep Mode. Description The E-STLC2416: - Accepts HCI commands from the Host ...
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... Active link When there is an active link (SCO or ACL), the E-STLC2416 cannot go in Deep Sleep Mode whatever the UART state is. But the E-STLC2416 baseband is made such that whenever it is possible, depending on the scheduled activity (number of link, type of link, amount of data exchanged), it goes in Sleep Mode ...
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... GHz ISM bandwidth usage for both devices while preserving the quality of some critical types of link. 6.12.2 Algorithm 2: WLAN master In case the E-STLC2416 has to cooperate collocated scenario, with a WLAN device not supporting a PTA based algorithm possible to put in place a simpler mechanism. The interface is reduced to 1 line: Figure 7. ...
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... AWMA utilizes a portion of the WLAN beacon interval for Bluetooth operations. From a timing perspective, the medium assignment alternates between usage following WLAN procedures and usage following Bluetooth procedures. The timing synchronization between the WLAN and the E-STLC2416 is done by the HW signal MEDIUM_FREE. Table 12. ...
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... HCI UART transport layer: – all HCI commands as described in the Bluetooth™ specification 1.1 – ST specific HCI command (check E-STLC2416 Software Interface document for more information) RXD, TXD, CTS, RTS on permanent external pins 128-byte FIFOs, for transmit and for receive Default configuration: 57 ...
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... To support this application, the data size is 32 bits. The 32 bits support is implemented for both transmit and receive. 28/37 spi_clk spi_frm spi_txd spi_rxd spi_txd STLC2416 spi_r xd SPI slave mode 32 bits spi_frm spi_clk 32 spi_clk 16 spi_clk E-STLC2416 Agilent ADNS-2030 spi_clk spi_io STw5094A CODEC SPI master mode 32 bits stereo headset ...
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... E-STLC2416 7.3 I2C interface Used to access I2C peripherals. The interface is a fast master I2C; it has full control of the interface at all times. I2C slave functionality is not supported. 7.4 USB interface The USB interface is compliant with the USB 2.0 full speed specification. Max throughput on the USB interface is 12 Mbit/s ...
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... Interfaces 7.6 RF Interface The E-STLC2416 radio interface is compatible to BlueRF (unidirectional RxMode2 for data and unidirectional serial interface for control). 7.7 PCM voice interface The voice interface is a direct PCM interface to connect to a standard CODEC (e.g. STw5093 or STw5094) including internal decimator and interpolator filters. The data can be linear PCM (13-16bit), µ ...
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... E-STLC2416 Table 14. PCM interface timing Symbol F Frequency of PCM_CLK (master) pcm_clk F Frequency of PCM_SYNC pcm_sync t High period of PCM_CLK WCH t Low period of PCM_CLK WCL t High period of PCM_SYNC WSH Setup time, PCM_SYNC high to t SSC PCM_CLK low Setup time, PCM_A/B input valid to t SDC PCM_CLK low ...
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... HCI UART transport layer The UART Transport Layer has been specified by the Bluetooth™ SIG, and allows HCI level communication between a host controller (E-STLC2416) and a host (e.g. PC), via a serial line. The objective of this HCI UART Transport Layer is to make it possible to use the Bluetooth™ ...
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... HCI USB transport layer The USB Transport Layer has been specified by the Bluetooth™ SIG, and allows HCI level communication between a host controller (E-STLC2416) and a host (e.g. PC), via a USB interface. The USB Transport Layer is completely implemented in SW. It accepts HCI messages from the HCI Layer, prepares it for transmission over a USB bus, and sends it to the USB Driver ...
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... USB reset pull.) Power Class 1 rxon Power Class 1 not_rxon Power Class 1 PA0 or PCM sync 1 Power Class 1 PA1 or PCM sync 2 Power Class 1 PA2 or PCM sync 3 Power Class 1 PA3 Power Class 1 PA4 Power Class 1 PA5 Power Class 1 PA6 Power Class 1 PA7 E-STLC2416 Table 15. ...
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... E-STLC2416 11 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... E-STLC2416 13 Revision history Table 17. Document revision history Date 20-Nov-2006 03-Oct-2008 36/37 Package LFBGA120 (lead free) Revision 1 Initial release. Updated the document status to ‘Nor recommended for new design’. 2 Applied ST-NXP Wireless template. No change in the content. E-STLC2416 Temp. Range -40 to +85 °C Changes ...
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... E-STLC2416 Information in this document is provided solely in connection with ST-NXP products. ST-NXP Wireless NV and its subsidiaries (“ST-NXP”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST-NXP products are sold pursuant to ST-NXP’s terms and conditions of sale. ...