TDA18271HD/C2.518 NXP Semiconductors, TDA18271HD/C2.518 Datasheet - Page 61
TDA18271HD/C2.518
Manufacturer Part Number
TDA18271HD/C2.518
Description
Manufacturer
NXP Semiconductors
Datasheet
1.TDA18271HDC2.518.pdf
(70 pages)
Specifications of TDA18271HD/C2.518
Lead Free Status / Rohs Status
Compliant
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NXP Semiconductors
TDA18271HD_4
Product data sheet
Table 62.
T
otherwise specified.
[1]
Symbol
I
Pin SCL
V
V
f
pin SDA
V
V
V
2
SCL
amb
Fig 23. Typical phase noise curve
IL
IH
OH
IL
IH
C-bus
Devices that use non-standard supply voltages, which do not conform to the intended I
levels, must relate their input levels to the supply voltage to which the pull-up resistors are connected.
= 25 C; V
(dBc/Hz)
(1) Offset is 1 kHz
(2) Offset is 10 kHz
(3) Offset is 100 kHz
[1]
100
110
120
n
70
80
90
Characteristics of terminals
40
Parameter
LOW-level input
voltage
HIGH-level input
voltage
SCL clock
frequency
HIGH-level output
voltage
LOW-level input
voltage
HIGH-level input
voltage
CC
= 3.3 V; 2.2 nF on input pin V_IFAGC; for test circuit see
140
Rev. 04 — 19 May 2009
240
Conditions
fixed input levels
V
fixed input levels
V
I
current)
fixed input levels
V
fixed input levels
V
SDA
DD
DD
DD
DD
340
related input levels
related input levels
related input levels
related input levels
= 3 mA (sink
…continued
440
540
640
Min
-
-
3
0.7V
-
-
-
-
3
0.7V
(1)
(2)
(3)
TDA18271HD
DD
DD
740
Typ
-
-
-
-
-
-
-
-
-
-
Figure
840
f
RF
001aah561
© NXP B.V. 2009. All rights reserved.
Silicon Tuner IC
(MHz)
Max
1.5
0.3V
-
-
400
0.4
1.5
0.3V
-
-
2
C-bus system
27; unless
940
DD
DD
Unit
V
V
V
V
kHz
V
V
V
V
V
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